# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
# ATT: vcvtnebf162ibs %xmm23, %xmm22
# INTEL: vcvtnebf162ibs xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x69,0xf7
# ATT: vcvtnebf162ibs %xmm23, %xmm22 {%k7}
# INTEL: vcvtnebf162ibs xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x69,0xf7
# ATT: vcvtnebf162ibs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x69,0xf7
# ATT: vcvtnebf162ibs %zmm23, %zmm22
# INTEL: vcvtnebf162ibs zmm22, zmm23
0x62,0xa5,0x7f,0x48,0x69,0xf7
# ATT: vcvtnebf162ibs %zmm23, %zmm22 {%k7}
# INTEL: vcvtnebf162ibs zmm22 {k7}, zmm23
0x62,0xa5,0x7f,0x4f,0x69,0xf7
# ATT: vcvtnebf162ibs %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, zmm23
0x62,0xa5,0x7f,0xcf,0x69,0xf7
# ATT: vcvtnebf162ibs %ymm23, %ymm22
# INTEL: vcvtnebf162ibs ymm22, ymm23
0x62,0xa5,0x7f,0x28,0x69,0xf7
# ATT: vcvtnebf162ibs %ymm23, %ymm22 {%k7}
# INTEL: vcvtnebf162ibs ymm22 {k7}, ymm23
0x62,0xa5,0x7f,0x2f,0x69,0xf7
# ATT: vcvtnebf162ibs %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xaf,0x69,0xf7
# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtnebf162ibs (%rip){1to8}, %xmm22
# INTEL: vcvtnebf162ibs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7f,0x18,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtnebf162ibs -512(,%rbp,2), %xmm22
# INTEL: vcvtnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0x8f,0x69,0x71,0x7f
# ATT: vcvtnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7f,0x9f,0x69,0x72,0x80
# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtnebf162ibs (%rip){1to16}, %ymm22
# INTEL: vcvtnebf162ibs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7f,0x38,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtnebf162ibs -1024(,%rbp,2), %ymm22
# INTEL: vcvtnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xaf,0x69,0x71,0x7f
# ATT: vcvtnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7f,0xbf,0x69,0x72,0x80
# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvtnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvtnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtnebf162ibs (%rip){1to32}, %zmm22
# INTEL: vcvtnebf162ibs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7f,0x58,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtnebf162ibs -2048(,%rbp,2), %zmm22
# INTEL: vcvtnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7f,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7f,0xcf,0x69,0x71,0x7f
# ATT: vcvtnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7f,0xdf,0x69,0x72,0x80
# ATT: vcvtnebf162iubs %xmm23, %xmm22
# INTEL: vcvtnebf162iubs xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x6b,0xf7
# ATT: vcvtnebf162iubs %xmm23, %xmm22 {%k7}
# INTEL: vcvtnebf162iubs xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x6b,0xf7
# ATT: vcvtnebf162iubs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x6b,0xf7
# ATT: vcvtnebf162iubs %zmm23, %zmm22
# INTEL: vcvtnebf162iubs zmm22, zmm23
0x62,0xa5,0x7f,0x48,0x6b,0xf7
# ATT: vcvtnebf162iubs %zmm23, %zmm22 {%k7}
# INTEL: vcvtnebf162iubs zmm22 {k7}, zmm23
0x62,0xa5,0x7f,0x4f,0x6b,0xf7
# ATT: vcvtnebf162iubs %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, zmm23
0x62,0xa5,0x7f,0xcf,0x6b,0xf7
# ATT: vcvtnebf162iubs %ymm23, %ymm22
# INTEL: vcvtnebf162iubs ymm22, ymm23
0x62,0xa5,0x7f,0x28,0x6b,0xf7
# ATT: vcvtnebf162iubs %ymm23, %ymm22 {%k7}
# INTEL: vcvtnebf162iubs ymm22 {k7}, ymm23
0x62,0xa5,0x7f,0x2f,0x6b,0xf7
# ATT: vcvtnebf162iubs %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xaf,0x6b,0xf7
# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtnebf162iubs (%rip){1to8}, %xmm22
# INTEL: vcvtnebf162iubs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7f,0x18,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtnebf162iubs -512(,%rbp,2), %xmm22
# INTEL: vcvtnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0x8f,0x6b,0x71,0x7f
# ATT: vcvtnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7f,0x9f,0x6b,0x72,0x80
# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtnebf162iubs (%rip){1to16}, %ymm22
# INTEL: vcvtnebf162iubs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7f,0x38,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtnebf162iubs -1024(,%rbp,2), %ymm22
# INTEL: vcvtnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xaf,0x6b,0x71,0x7f
# ATT: vcvtnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7f,0xbf,0x6b,0x72,0x80
# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvtnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvtnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtnebf162iubs (%rip){1to32}, %zmm22
# INTEL: vcvtnebf162iubs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7f,0x58,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtnebf162iubs -2048(,%rbp,2), %zmm22
# INTEL: vcvtnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7f,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7f,0xcf,0x6b,0x71,0x7f
# ATT: vcvtnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7f,0xdf,0x6b,0x72,0x80
# ATT: vcvtph2ibs %xmm23, %xmm22
# INTEL: vcvtph2ibs xmm22, xmm23
0x62,0xa5,0x7c,0x08,0x69,0xf7
# ATT: vcvtph2ibs %xmm23, %xmm22 {%k7}
# INTEL: vcvtph2ibs xmm22 {k7}, xmm23
0x62,0xa5,0x7c,0x0f,0x69,0xf7
# ATT: vcvtph2ibs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtph2ibs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7c,0x8f,0x69,0xf7
# ATT: vcvtph2ibs %zmm23, %zmm22
# INTEL: vcvtph2ibs zmm22, zmm23
0x62,0xa5,0x7c,0x48,0x69,0xf7
# ATT: vcvtph2ibs {rn-sae}, %zmm23, %zmm22
# INTEL: vcvtph2ibs zmm22, zmm23, {rn-sae}
0x62,0xa5,0x7c,0x18,0x69,0xf7
# ATT: vcvtph2ibs %zmm23, %zmm22 {%k7}
# INTEL: vcvtph2ibs zmm22 {k7}, zmm23
0x62,0xa5,0x7c,0x4f,0x69,0xf7
# ATT: vcvtph2ibs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtph2ibs zmm22 {k7} {z}, zmm23, {rz-sae}
0x62,0xa5,0x7c,0xff,0x69,0xf7
# ATT: vcvtph2ibs %ymm23, %ymm22
# INTEL: vcvtph2ibs ymm22, ymm23
0x62,0xa5,0x7c,0x28,0x69,0xf7
# ATT: vcvtph2ibs {rn-sae}, %ymm23, %ymm22
# INTEL: vcvtph2ibs ymm22, ymm23, {rn-sae}
0x62,0xa5,0x78,0x18,0x69,0xf7
# ATT: vcvtph2ibs %ymm23, %ymm22 {%k7}
# INTEL: vcvtph2ibs ymm22 {k7}, ymm23
0x62,0xa5,0x7c,0x2f,0x69,0xf7
# ATT: vcvtph2ibs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtph2ibs ymm22 {k7} {z}, ymm23, {rz-sae}
0x62,0xa5,0x78,0xff,0x69,0xf7
# ATT: vcvtph2ibs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtph2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtph2ibs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtph2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtph2ibs (%rip){1to8}, %xmm22
# INTEL: vcvtph2ibs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7c,0x18,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtph2ibs -512(,%rbp,2), %xmm22
# INTEL: vcvtph2ibs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7c,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtph2ibs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtph2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7c,0x8f,0x69,0x71,0x7f
# ATT: vcvtph2ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvtph2ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7c,0x9f,0x69,0x72,0x80
# ATT: vcvtph2ibs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtph2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtph2ibs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtph2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtph2ibs (%rip){1to16}, %ymm22
# INTEL: vcvtph2ibs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7c,0x38,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtph2ibs -1024(,%rbp,2), %ymm22
# INTEL: vcvtph2ibs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7c,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtph2ibs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtph2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7c,0xaf,0x69,0x71,0x7f
# ATT: vcvtph2ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
# INTEL: vcvtph2ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7c,0xbf,0x69,0x72,0x80
# ATT: vcvtph2ibs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvtph2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtph2ibs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvtph2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtph2ibs (%rip){1to32}, %zmm22
# INTEL: vcvtph2ibs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7c,0x58,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtph2ibs -2048(,%rbp,2), %zmm22
# INTEL: vcvtph2ibs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7c,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtph2ibs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvtph2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7c,0xcf,0x69,0x71,0x7f
# ATT: vcvtph2ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
# INTEL: vcvtph2ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7c,0xdf,0x69,0x72,0x80
# ATT: vcvtph2iubs %xmm23, %xmm22
# INTEL: vcvtph2iubs xmm22, xmm23
0x62,0xa5,0x7c,0x08,0x6b,0xf7
# ATT: vcvtph2iubs %xmm23, %xmm22 {%k7}
# INTEL: vcvtph2iubs xmm22 {k7}, xmm23
0x62,0xa5,0x7c,0x0f,0x6b,0xf7
# ATT: vcvtph2iubs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtph2iubs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7c,0x8f,0x6b,0xf7
# ATT: vcvtph2iubs %zmm23, %zmm22
# INTEL: vcvtph2iubs zmm22, zmm23
0x62,0xa5,0x7c,0x48,0x6b,0xf7
# ATT: vcvtph2iubs {rn-sae}, %zmm23, %zmm22
# INTEL: vcvtph2iubs zmm22, zmm23, {rn-sae}
0x62,0xa5,0x7c,0x18,0x6b,0xf7
# ATT: vcvtph2iubs %zmm23, %zmm22 {%k7}
# INTEL: vcvtph2iubs zmm22 {k7}, zmm23
0x62,0xa5,0x7c,0x4f,0x6b,0xf7
# ATT: vcvtph2iubs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtph2iubs zmm22 {k7} {z}, zmm23, {rz-sae}
0x62,0xa5,0x7c,0xff,0x6b,0xf7
# ATT: vcvtph2iubs %ymm23, %ymm22
# INTEL: vcvtph2iubs ymm22, ymm23
0x62,0xa5,0x7c,0x28,0x6b,0xf7
# ATT: vcvtph2iubs {rn-sae}, %ymm23, %ymm22
# INTEL: vcvtph2iubs ymm22, ymm23, {rn-sae}
0x62,0xa5,0x78,0x18,0x6b,0xf7
# ATT: vcvtph2iubs %ymm23, %ymm22 {%k7}
# INTEL: vcvtph2iubs ymm22 {k7}, ymm23
0x62,0xa5,0x7c,0x2f,0x6b,0xf7
# ATT: vcvtph2iubs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtph2iubs ymm22 {k7} {z}, ymm23, {rz-sae}
0x62,0xa5,0x78,0xff,0x6b,0xf7
# ATT: vcvtph2iubs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtph2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtph2iubs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtph2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtph2iubs (%rip){1to8}, %xmm22
# INTEL: vcvtph2iubs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7c,0x18,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtph2iubs -512(,%rbp,2), %xmm22
# INTEL: vcvtph2iubs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7c,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtph2iubs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtph2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7c,0x8f,0x6b,0x71,0x7f
# ATT: vcvtph2iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvtph2iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7c,0x9f,0x6b,0x72,0x80
# ATT: vcvtph2iubs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtph2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtph2iubs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtph2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtph2iubs (%rip){1to16}, %ymm22
# INTEL: vcvtph2iubs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7c,0x38,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtph2iubs -1024(,%rbp,2), %ymm22
# INTEL: vcvtph2iubs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7c,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtph2iubs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtph2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7c,0xaf,0x6b,0x71,0x7f
# ATT: vcvtph2iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
# INTEL: vcvtph2iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7c,0xbf,0x6b,0x72,0x80
# ATT: vcvtph2iubs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvtph2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtph2iubs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvtph2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtph2iubs (%rip){1to32}, %zmm22
# INTEL: vcvtph2iubs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7c,0x58,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtph2iubs -2048(,%rbp,2), %zmm22
# INTEL: vcvtph2iubs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7c,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtph2iubs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvtph2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7c,0xcf,0x6b,0x71,0x7f
# ATT: vcvtph2iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
# INTEL: vcvtph2iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7c,0xdf,0x6b,0x72,0x80
# ATT: vcvtps2ibs %xmm23, %xmm22
# INTEL: vcvtps2ibs xmm22, xmm23
0x62,0xa5,0x7d,0x08,0x69,0xf7
# ATT: vcvtps2ibs %xmm23, %xmm22 {%k7}
# INTEL: vcvtps2ibs xmm22 {k7}, xmm23
0x62,0xa5,0x7d,0x0f,0x69,0xf7
# ATT: vcvtps2ibs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtps2ibs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7d,0x8f,0x69,0xf7
# ATT: vcvtps2ibs %zmm23, %zmm22
# INTEL: vcvtps2ibs zmm22, zmm23
0x62,0xa5,0x7d,0x48,0x69,0xf7
# ATT: vcvtps2ibs {rn-sae}, %zmm23, %zmm22
# INTEL: vcvtps2ibs zmm22, zmm23, {rn-sae}
0x62,0xa5,0x7d,0x18,0x69,0xf7
# ATT: vcvtps2ibs %zmm23, %zmm22 {%k7}
# INTEL: vcvtps2ibs zmm22 {k7}, zmm23
0x62,0xa5,0x7d,0x4f,0x69,0xf7
# ATT: vcvtps2ibs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtps2ibs zmm22 {k7} {z}, zmm23, {rz-sae}
0x62,0xa5,0x7d,0xff,0x69,0xf7
# ATT: vcvtps2ibs %ymm23, %ymm22
# INTEL: vcvtps2ibs ymm22, ymm23
0x62,0xa5,0x7d,0x28,0x69,0xf7
# ATT: vcvtps2ibs {rn-sae}, %ymm23, %ymm22
# INTEL: vcvtps2ibs ymm22, ymm23, {rn-sae}
0x62,0xa5,0x79,0x18,0x69,0xf7
# ATT: vcvtps2ibs %ymm23, %ymm22 {%k7}
# INTEL: vcvtps2ibs ymm22 {k7}, ymm23
0x62,0xa5,0x7d,0x2f,0x69,0xf7
# ATT: vcvtps2ibs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtps2ibs ymm22 {k7} {z}, ymm23, {rz-sae}
0x62,0xa5,0x79,0xff,0x69,0xf7
# ATT: vcvtps2ibs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtps2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtps2ibs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtps2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtps2ibs (%rip){1to4}, %xmm22
# INTEL: vcvtps2ibs xmm22, dword ptr [rip]{1to4}
0x62,0xe5,0x7d,0x18,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtps2ibs -512(,%rbp,2), %xmm22
# INTEL: vcvtps2ibs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7d,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtps2ibs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtps2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7d,0x8f,0x69,0x71,0x7f
# ATT: vcvtps2ibs -512(%rdx){1to4}, %xmm22 {%k7} {z}
# INTEL: vcvtps2ibs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
0x62,0xe5,0x7d,0x9f,0x69,0x72,0x80
# ATT: vcvtps2ibs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtps2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtps2ibs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtps2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtps2ibs (%rip){1to8}, %ymm22
# INTEL: vcvtps2ibs ymm22, dword ptr [rip]{1to8}
0x62,0xe5,0x7d,0x38,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtps2ibs -1024(,%rbp,2), %ymm22
# INTEL: vcvtps2ibs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7d,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtps2ibs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtps2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7d,0xaf,0x69,0x71,0x7f
# ATT: vcvtps2ibs -512(%rdx){1to8}, %ymm22 {%k7} {z}
# INTEL: vcvtps2ibs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
0x62,0xe5,0x7d,0xbf,0x69,0x72,0x80
# ATT: vcvtps2ibs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvtps2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtps2ibs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvtps2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtps2ibs (%rip){1to16}, %zmm22
# INTEL: vcvtps2ibs zmm22, dword ptr [rip]{1to16}
0x62,0xe5,0x7d,0x58,0x69,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtps2ibs -2048(,%rbp,2), %zmm22
# INTEL: vcvtps2ibs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7d,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtps2ibs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvtps2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7d,0xcf,0x69,0x71,0x7f
# ATT: vcvtps2ibs -512(%rdx){1to16}, %zmm22 {%k7} {z}
# INTEL: vcvtps2ibs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
0x62,0xe5,0x7d,0xdf,0x69,0x72,0x80
# ATT: vcvtps2iubs %xmm23, %xmm22
# INTEL: vcvtps2iubs xmm22, xmm23
0x62,0xa5,0x7d,0x08,0x6b,0xf7
# ATT: vcvtps2iubs %xmm23, %xmm22 {%k7}
# INTEL: vcvtps2iubs xmm22 {k7}, xmm23
0x62,0xa5,0x7d,0x0f,0x6b,0xf7
# ATT: vcvtps2iubs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtps2iubs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7d,0x8f,0x6b,0xf7
# ATT: vcvtps2iubs %zmm23, %zmm22
# INTEL: vcvtps2iubs zmm22, zmm23
0x62,0xa5,0x7d,0x48,0x6b,0xf7
# ATT: vcvtps2iubs {rn-sae}, %zmm23, %zmm22
# INTEL: vcvtps2iubs zmm22, zmm23, {rn-sae}
0x62,0xa5,0x7d,0x18,0x6b,0xf7
# ATT: vcvtps2iubs %zmm23, %zmm22 {%k7}
# INTEL: vcvtps2iubs zmm22 {k7}, zmm23
0x62,0xa5,0x7d,0x4f,0x6b,0xf7
# ATT: vcvtps2iubs {rz-sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtps2iubs zmm22 {k7} {z}, zmm23, {rz-sae}
0x62,0xa5,0x7d,0xff,0x6b,0xf7
# ATT: vcvtps2iubs %ymm23, %ymm22
# INTEL: vcvtps2iubs ymm22, ymm23
0x62,0xa5,0x7d,0x28,0x6b,0xf7
# ATT: vcvtps2iubs {rn-sae}, %ymm23, %ymm22
# INTEL: vcvtps2iubs ymm22, ymm23, {rn-sae}
0x62,0xa5,0x79,0x18,0x6b,0xf7
# ATT: vcvtps2iubs %ymm23, %ymm22 {%k7}
# INTEL: vcvtps2iubs ymm22 {k7}, ymm23
0x62,0xa5,0x7d,0x2f,0x6b,0xf7
# ATT: vcvtps2iubs {rz-sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtps2iubs ymm22 {k7} {z}, ymm23, {rz-sae}
0x62,0xa5,0x79,0xff,0x6b,0xf7
# ATT: vcvtps2iubs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtps2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtps2iubs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtps2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtps2iubs (%rip){1to4}, %xmm22
# INTEL: vcvtps2iubs xmm22, dword ptr [rip]{1to4}
0x62,0xe5,0x7d,0x18,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtps2iubs -512(,%rbp,2), %xmm22
# INTEL: vcvtps2iubs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7d,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtps2iubs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtps2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7d,0x8f,0x6b,0x71,0x7f
# ATT: vcvtps2iubs -512(%rdx){1to4}, %xmm22 {%k7} {z}
# INTEL: vcvtps2iubs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
0x62,0xe5,0x7d,0x9f,0x6b,0x72,0x80
# ATT: vcvtps2iubs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtps2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtps2iubs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtps2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtps2iubs (%rip){1to8}, %ymm22
# INTEL: vcvtps2iubs ymm22, dword ptr [rip]{1to8}
0x62,0xe5,0x7d,0x38,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtps2iubs -1024(,%rbp,2), %ymm22
# INTEL: vcvtps2iubs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7d,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtps2iubs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtps2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7d,0xaf,0x6b,0x71,0x7f
# ATT: vcvtps2iubs -512(%rdx){1to8}, %ymm22 {%k7} {z}
# INTEL: vcvtps2iubs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
0x62,0xe5,0x7d,0xbf,0x6b,0x72,0x80
# ATT: vcvtps2iubs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvtps2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtps2iubs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvtps2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtps2iubs (%rip){1to16}, %zmm22
# INTEL: vcvtps2iubs zmm22, dword ptr [rip]{1to16}
0x62,0xe5,0x7d,0x58,0x6b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtps2iubs -2048(,%rbp,2), %zmm22
# INTEL: vcvtps2iubs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7d,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtps2iubs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvtps2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7d,0xcf,0x6b,0x71,0x7f
# ATT: vcvtps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
# INTEL: vcvtps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
0x62,0xe5,0x7d,0xdf,0x6b,0x72,0x80
# ATT: vcvttnebf162ibs %xmm23, %xmm22
# INTEL: vcvttnebf162ibs xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x68,0xf7
# ATT: vcvttnebf162ibs %xmm23, %xmm22 {%k7}
# INTEL: vcvttnebf162ibs xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x68,0xf7
# ATT: vcvttnebf162ibs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x68,0xf7
# ATT: vcvttnebf162ibs %zmm23, %zmm22
# INTEL: vcvttnebf162ibs zmm22, zmm23
0x62,0xa5,0x7f,0x48,0x68,0xf7
# ATT: vcvttnebf162ibs %zmm23, %zmm22 {%k7}
# INTEL: vcvttnebf162ibs zmm22 {k7}, zmm23
0x62,0xa5,0x7f,0x4f,0x68,0xf7
# ATT: vcvttnebf162ibs %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, zmm23
0x62,0xa5,0x7f,0xcf,0x68,0xf7
# ATT: vcvttnebf162ibs %ymm23, %ymm22
# INTEL: vcvttnebf162ibs ymm22, ymm23
0x62,0xa5,0x7f,0x28,0x68,0xf7
# ATT: vcvttnebf162ibs %ymm23, %ymm22 {%k7}
# INTEL: vcvttnebf162ibs ymm22 {k7}, ymm23
0x62,0xa5,0x7f,0x2f,0x68,0xf7
# ATT: vcvttnebf162ibs %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xaf,0x68,0xf7
# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttnebf162ibs (%rip){1to8}, %xmm22
# INTEL: vcvttnebf162ibs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7f,0x18,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttnebf162ibs -512(,%rbp,2), %xmm22
# INTEL: vcvttnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0x8f,0x68,0x71,0x7f
# ATT: vcvttnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7f,0x9f,0x68,0x72,0x80
# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttnebf162ibs (%rip){1to16}, %ymm22
# INTEL: vcvttnebf162ibs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7f,0x38,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttnebf162ibs -1024(,%rbp,2), %ymm22
# INTEL: vcvttnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xaf,0x68,0x71,0x7f
# ATT: vcvttnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7f,0xbf,0x68,0x72,0x80
# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttnebf162ibs (%rip){1to32}, %zmm22
# INTEL: vcvttnebf162ibs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7f,0x58,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttnebf162ibs -2048(,%rbp,2), %zmm22
# INTEL: vcvttnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7f,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7f,0xcf,0x68,0x71,0x7f
# ATT: vcvttnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7f,0xdf,0x68,0x72,0x80
# ATT: vcvttnebf162iubs %xmm23, %xmm22
# INTEL: vcvttnebf162iubs xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x6a,0xf7
# ATT: vcvttnebf162iubs %xmm23, %xmm22 {%k7}
# INTEL: vcvttnebf162iubs xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x6a,0xf7
# ATT: vcvttnebf162iubs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x6a,0xf7
# ATT: vcvttnebf162iubs %zmm23, %zmm22
# INTEL: vcvttnebf162iubs zmm22, zmm23
0x62,0xa5,0x7f,0x48,0x6a,0xf7
# ATT: vcvttnebf162iubs %zmm23, %zmm22 {%k7}
# INTEL: vcvttnebf162iubs zmm22 {k7}, zmm23
0x62,0xa5,0x7f,0x4f,0x6a,0xf7
# ATT: vcvttnebf162iubs %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, zmm23
0x62,0xa5,0x7f,0xcf,0x6a,0xf7
# ATT: vcvttnebf162iubs %ymm23, %ymm22
# INTEL: vcvttnebf162iubs ymm22, ymm23
0x62,0xa5,0x7f,0x28,0x6a,0xf7
# ATT: vcvttnebf162iubs %ymm23, %ymm22 {%k7}
# INTEL: vcvttnebf162iubs ymm22 {k7}, ymm23
0x62,0xa5,0x7f,0x2f,0x6a,0xf7
# ATT: vcvttnebf162iubs %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xaf,0x6a,0xf7
# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttnebf162iubs (%rip){1to8}, %xmm22
# INTEL: vcvttnebf162iubs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7f,0x18,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttnebf162iubs -512(,%rbp,2), %xmm22
# INTEL: vcvttnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0x8f,0x6a,0x71,0x7f
# ATT: vcvttnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7f,0x9f,0x6a,0x72,0x80
# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttnebf162iubs (%rip){1to16}, %ymm22
# INTEL: vcvttnebf162iubs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7f,0x38,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttnebf162iubs -1024(,%rbp,2), %ymm22
# INTEL: vcvttnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xaf,0x6a,0x71,0x7f
# ATT: vcvttnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7f,0xbf,0x6a,0x72,0x80
# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttnebf162iubs (%rip){1to32}, %zmm22
# INTEL: vcvttnebf162iubs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7f,0x58,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttnebf162iubs -2048(,%rbp,2), %zmm22
# INTEL: vcvttnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7f,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7f,0xcf,0x6a,0x71,0x7f
# ATT: vcvttnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7f,0xdf,0x6a,0x72,0x80
# ATT: vcvttph2ibs %xmm23, %xmm22
# INTEL: vcvttph2ibs xmm22, xmm23
0x62,0xa5,0x7c,0x08,0x68,0xf7
# ATT: vcvttph2ibs %xmm23, %xmm22 {%k7}
# INTEL: vcvttph2ibs xmm22 {k7}, xmm23
0x62,0xa5,0x7c,0x0f,0x68,0xf7
# ATT: vcvttph2ibs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttph2ibs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7c,0x8f,0x68,0xf7
# ATT: vcvttph2ibs %zmm23, %zmm22
# INTEL: vcvttph2ibs zmm22, zmm23
0x62,0xa5,0x7c,0x48,0x68,0xf7
# ATT: vcvttph2ibs {sae}, %zmm23, %zmm22
# INTEL: vcvttph2ibs zmm22, zmm23, {sae}
0x62,0xa5,0x7c,0x18,0x68,0xf7
# ATT: vcvttph2ibs %zmm23, %zmm22 {%k7}
# INTEL: vcvttph2ibs zmm22 {k7}, zmm23
0x62,0xa5,0x7c,0x4f,0x68,0xf7
# ATT: vcvttph2ibs {sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttph2ibs zmm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0x7c,0x9f,0x68,0xf7
# ATT: vcvttph2ibs %ymm23, %ymm22
# INTEL: vcvttph2ibs ymm22, ymm23
0x62,0xa5,0x7c,0x28,0x68,0xf7
# ATT: vcvttph2ibs {sae}, %ymm23, %ymm22
# INTEL: vcvttph2ibs ymm22, ymm23, {sae}
0x62,0xa5,0x78,0x18,0x68,0xf7
# ATT: vcvttph2ibs %ymm23, %ymm22 {%k7}
# INTEL: vcvttph2ibs ymm22 {k7}, ymm23
0x62,0xa5,0x7c,0x2f,0x68,0xf7
# ATT: vcvttph2ibs {sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttph2ibs ymm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0x78,0x9f,0x68,0xf7
# ATT: vcvttph2ibs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttph2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttph2ibs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttph2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttph2ibs (%rip){1to8}, %xmm22
# INTEL: vcvttph2ibs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7c,0x18,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttph2ibs -512(,%rbp,2), %xmm22
# INTEL: vcvttph2ibs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7c,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttph2ibs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttph2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7c,0x8f,0x68,0x71,0x7f
# ATT: vcvttph2ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvttph2ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7c,0x9f,0x68,0x72,0x80
# ATT: vcvttph2ibs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttph2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttph2ibs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttph2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttph2ibs (%rip){1to16}, %ymm22
# INTEL: vcvttph2ibs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7c,0x38,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttph2ibs -1024(,%rbp,2), %ymm22
# INTEL: vcvttph2ibs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7c,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttph2ibs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttph2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7c,0xaf,0x68,0x71,0x7f
# ATT: vcvttph2ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
# INTEL: vcvttph2ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7c,0xbf,0x68,0x72,0x80
# ATT: vcvttph2ibs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttph2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttph2ibs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttph2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttph2ibs (%rip){1to32}, %zmm22
# INTEL: vcvttph2ibs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7c,0x58,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttph2ibs -2048(,%rbp,2), %zmm22
# INTEL: vcvttph2ibs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7c,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttph2ibs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttph2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7c,0xcf,0x68,0x71,0x7f
# ATT: vcvttph2ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
# INTEL: vcvttph2ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7c,0xdf,0x68,0x72,0x80
# ATT: vcvttph2iubs %xmm23, %xmm22
# INTEL: vcvttph2iubs xmm22, xmm23
0x62,0xa5,0x7c,0x08,0x6a,0xf7
# ATT: vcvttph2iubs %xmm23, %xmm22 {%k7}
# INTEL: vcvttph2iubs xmm22 {k7}, xmm23
0x62,0xa5,0x7c,0x0f,0x6a,0xf7
# ATT: vcvttph2iubs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttph2iubs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7c,0x8f,0x6a,0xf7
# ATT: vcvttph2iubs %zmm23, %zmm22
# INTEL: vcvttph2iubs zmm22, zmm23
0x62,0xa5,0x7c,0x48,0x6a,0xf7
# ATT: vcvttph2iubs {sae}, %zmm23, %zmm22
# INTEL: vcvttph2iubs zmm22, zmm23, {sae}
0x62,0xa5,0x7c,0x18,0x6a,0xf7
# ATT: vcvttph2iubs %zmm23, %zmm22 {%k7}
# INTEL: vcvttph2iubs zmm22 {k7}, zmm23
0x62,0xa5,0x7c,0x4f,0x6a,0xf7
# ATT: vcvttph2iubs {sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttph2iubs zmm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0x7c,0x9f,0x6a,0xf7
# ATT: vcvttph2iubs %ymm23, %ymm22
# INTEL: vcvttph2iubs ymm22, ymm23
0x62,0xa5,0x7c,0x28,0x6a,0xf7
# ATT: vcvttph2iubs {sae}, %ymm23, %ymm22
# INTEL: vcvttph2iubs ymm22, ymm23, {sae}
0x62,0xa5,0x78,0x18,0x6a,0xf7
# ATT: vcvttph2iubs %ymm23, %ymm22 {%k7}
# INTEL: vcvttph2iubs ymm22 {k7}, ymm23
0x62,0xa5,0x7c,0x2f,0x6a,0xf7
# ATT: vcvttph2iubs {sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttph2iubs ymm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0x78,0x9f,0x6a,0xf7
# ATT: vcvttph2iubs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttph2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttph2iubs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttph2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttph2iubs (%rip){1to8}, %xmm22
# INTEL: vcvttph2iubs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7c,0x18,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttph2iubs -512(,%rbp,2), %xmm22
# INTEL: vcvttph2iubs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7c,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttph2iubs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttph2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7c,0x8f,0x6a,0x71,0x7f
# ATT: vcvttph2iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvttph2iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7c,0x9f,0x6a,0x72,0x80
# ATT: vcvttph2iubs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttph2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttph2iubs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttph2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttph2iubs (%rip){1to16}, %ymm22
# INTEL: vcvttph2iubs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7c,0x38,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttph2iubs -1024(,%rbp,2), %ymm22
# INTEL: vcvttph2iubs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7c,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttph2iubs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttph2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7c,0xaf,0x6a,0x71,0x7f
# ATT: vcvttph2iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
# INTEL: vcvttph2iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7c,0xbf,0x6a,0x72,0x80
# ATT: vcvttph2iubs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttph2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7c,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttph2iubs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttph2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7c,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttph2iubs (%rip){1to32}, %zmm22
# INTEL: vcvttph2iubs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7c,0x58,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttph2iubs -2048(,%rbp,2), %zmm22
# INTEL: vcvttph2iubs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7c,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttph2iubs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttph2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7c,0xcf,0x6a,0x71,0x7f
# ATT: vcvttph2iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
# INTEL: vcvttph2iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7c,0xdf,0x6a,0x72,0x80
# ATT: vcvttps2ibs %xmm23, %xmm22
# INTEL: vcvttps2ibs xmm22, xmm23
0x62,0xa5,0x7d,0x08,0x68,0xf7
# ATT: vcvttps2ibs %xmm23, %xmm22 {%k7}
# INTEL: vcvttps2ibs xmm22 {k7}, xmm23
0x62,0xa5,0x7d,0x0f,0x68,0xf7
# ATT: vcvttps2ibs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttps2ibs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7d,0x8f,0x68,0xf7
# ATT: vcvttps2ibs %zmm23, %zmm22
# INTEL: vcvttps2ibs zmm22, zmm23
0x62,0xa5,0x7d,0x48,0x68,0xf7
# ATT: vcvttps2ibs {sae}, %zmm23, %zmm22
# INTEL: vcvttps2ibs zmm22, zmm23, {sae}
0x62,0xa5,0x7d,0x18,0x68,0xf7
# ATT: vcvttps2ibs %zmm23, %zmm22 {%k7}
# INTEL: vcvttps2ibs zmm22 {k7}, zmm23
0x62,0xa5,0x7d,0x4f,0x68,0xf7
# ATT: vcvttps2ibs {sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttps2ibs zmm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0x7d,0x9f,0x68,0xf7
# ATT: vcvttps2ibs %ymm23, %ymm22
# INTEL: vcvttps2ibs ymm22, ymm23
0x62,0xa5,0x7d,0x28,0x68,0xf7
# ATT: vcvttps2ibs {sae}, %ymm23, %ymm22
# INTEL: vcvttps2ibs ymm22, ymm23, {sae}
0x62,0xa5,0x79,0x18,0x68,0xf7
# ATT: vcvttps2ibs %ymm23, %ymm22 {%k7}
# INTEL: vcvttps2ibs ymm22 {k7}, ymm23
0x62,0xa5,0x7d,0x2f,0x68,0xf7
# ATT: vcvttps2ibs {sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttps2ibs ymm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0x79,0x9f,0x68,0xf7
# ATT: vcvttps2ibs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttps2ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2ibs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttps2ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2ibs (%rip){1to4}, %xmm22
# INTEL: vcvttps2ibs xmm22, dword ptr [rip]{1to4}
0x62,0xe5,0x7d,0x18,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2ibs -512(,%rbp,2), %xmm22
# INTEL: vcvttps2ibs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7d,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttps2ibs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttps2ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7d,0x8f,0x68,0x71,0x7f
# ATT: vcvttps2ibs -512(%rdx){1to4}, %xmm22 {%k7} {z}
# INTEL: vcvttps2ibs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
0x62,0xe5,0x7d,0x9f,0x68,0x72,0x80
# ATT: vcvttps2ibs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttps2ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2ibs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttps2ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2ibs (%rip){1to8}, %ymm22
# INTEL: vcvttps2ibs ymm22, dword ptr [rip]{1to8}
0x62,0xe5,0x7d,0x38,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2ibs -1024(,%rbp,2), %ymm22
# INTEL: vcvttps2ibs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7d,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttps2ibs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttps2ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7d,0xaf,0x68,0x71,0x7f
# ATT: vcvttps2ibs -512(%rdx){1to8}, %ymm22 {%k7} {z}
# INTEL: vcvttps2ibs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
0x62,0xe5,0x7d,0xbf,0x68,0x72,0x80
# ATT: vcvttps2ibs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttps2ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2ibs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttps2ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2ibs (%rip){1to16}, %zmm22
# INTEL: vcvttps2ibs zmm22, dword ptr [rip]{1to16}
0x62,0xe5,0x7d,0x58,0x68,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2ibs -2048(,%rbp,2), %zmm22
# INTEL: vcvttps2ibs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7d,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttps2ibs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttps2ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7d,0xcf,0x68,0x71,0x7f
# ATT: vcvttps2ibs -512(%rdx){1to16}, %zmm22 {%k7} {z}
# INTEL: vcvttps2ibs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
0x62,0xe5,0x7d,0xdf,0x68,0x72,0x80
# ATT: vcvttps2iubs %xmm23, %xmm22
# INTEL: vcvttps2iubs xmm22, xmm23
0x62,0xa5,0x7d,0x08,0x6a,0xf7
# ATT: vcvttps2iubs %xmm23, %xmm22 {%k7}
# INTEL: vcvttps2iubs xmm22 {k7}, xmm23
0x62,0xa5,0x7d,0x0f,0x6a,0xf7
# ATT: vcvttps2iubs %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvttps2iubs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7d,0x8f,0x6a,0xf7
# ATT: vcvttps2iubs %zmm23, %zmm22
# INTEL: vcvttps2iubs zmm22, zmm23
0x62,0xa5,0x7d,0x48,0x6a,0xf7
# ATT: vcvttps2iubs {sae}, %zmm23, %zmm22
# INTEL: vcvttps2iubs zmm22, zmm23, {sae}
0x62,0xa5,0x7d,0x18,0x6a,0xf7
# ATT: vcvttps2iubs %zmm23, %zmm22 {%k7}
# INTEL: vcvttps2iubs zmm22 {k7}, zmm23
0x62,0xa5,0x7d,0x4f,0x6a,0xf7
# ATT: vcvttps2iubs {sae}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvttps2iubs zmm22 {k7} {z}, zmm23, {sae}
0x62,0xa5,0x7d,0x9f,0x6a,0xf7
# ATT: vcvttps2iubs %ymm23, %ymm22
# INTEL: vcvttps2iubs ymm22, ymm23
0x62,0xa5,0x7d,0x28,0x6a,0xf7
# ATT: vcvttps2iubs {sae}, %ymm23, %ymm22
# INTEL: vcvttps2iubs ymm22, ymm23, {sae}
0x62,0xa5,0x79,0x18,0x6a,0xf7
# ATT: vcvttps2iubs %ymm23, %ymm22 {%k7}
# INTEL: vcvttps2iubs ymm22 {k7}, ymm23
0x62,0xa5,0x7d,0x2f,0x6a,0xf7
# ATT: vcvttps2iubs {sae}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvttps2iubs ymm22 {k7} {z}, ymm23, {sae}
0x62,0xa5,0x79,0x9f,0x6a,0xf7
# ATT: vcvttps2iubs 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvttps2iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2iubs 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvttps2iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2iubs (%rip){1to4}, %xmm22
# INTEL: vcvttps2iubs xmm22, dword ptr [rip]{1to4}
0x62,0xe5,0x7d,0x18,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2iubs -512(,%rbp,2), %xmm22
# INTEL: vcvttps2iubs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7d,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvttps2iubs 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvttps2iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7d,0x8f,0x6a,0x71,0x7f
# ATT: vcvttps2iubs -512(%rdx){1to4}, %xmm22 {%k7} {z}
# INTEL: vcvttps2iubs xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
0x62,0xe5,0x7d,0x9f,0x6a,0x72,0x80
# ATT: vcvttps2iubs 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvttps2iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2iubs 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvttps2iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2iubs (%rip){1to8}, %ymm22
# INTEL: vcvttps2iubs ymm22, dword ptr [rip]{1to8}
0x62,0xe5,0x7d,0x38,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2iubs -1024(,%rbp,2), %ymm22
# INTEL: vcvttps2iubs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7d,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvttps2iubs 4064(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvttps2iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7d,0xaf,0x6a,0x71,0x7f
# ATT: vcvttps2iubs -512(%rdx){1to8}, %ymm22 {%k7} {z}
# INTEL: vcvttps2iubs ymm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
0x62,0xe5,0x7d,0xbf,0x6a,0x72,0x80
# ATT: vcvttps2iubs 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvttps2iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7d,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvttps2iubs 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvttps2iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7d,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvttps2iubs (%rip){1to16}, %zmm22
# INTEL: vcvttps2iubs zmm22, dword ptr [rip]{1to16}
0x62,0xe5,0x7d,0x58,0x6a,0x35,0x00,0x00,0x00,0x00
# ATT: vcvttps2iubs -2048(,%rbp,2), %zmm22
# INTEL: vcvttps2iubs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7d,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvttps2iubs 8128(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvttps2iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7d,0xcf,0x6a,0x71,0x7f
# ATT: vcvttps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
# INTEL: vcvttps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
0x62,0xe5,0x7d,0xdf,0x6a,0x72,0x80
Codebase Browser
llvm