# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+zbb -run-pass=instruction-select \
# RUN: -simplify-mir -verify-machineinstrs %s -o - \
# RUN: | FileCheck -check-prefix=RV32I %s
---
name: ctlz_s32
legalized: true
regBankSelected: true
body: |
bb.0.entry:
; RV32I-LABEL: name: ctlz_s32
; RV32I: [[COPY:%[0-9]+]]:gpr = COPY $x10
; RV32I-NEXT: [[CLZ:%[0-9]+]]:gpr = CLZ [[COPY]]
; RV32I-NEXT: $x10 = COPY [[CLZ]]
; RV32I-NEXT: PseudoRET implicit $x10
%0:gprb(s32) = COPY $x10
%1:gprb(s32) = G_CTLZ %0
$x10 = COPY %1(s32)
PseudoRET implicit $x10
...