llvm/llvm/test/CodeGen/X86/avx10_2fptosi_satcvtds.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-linux -mattr=+avx10.2-256 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx10.2-256 | FileCheck %s --check-prefix=X64

;
; 32-bit float to signed integer
;

declare  i32 @llvm.fptosi.sat.i32.f32 (float)
declare  i64 @llvm.fptosi.sat.i64.f32 (float)

define i32 @test_signed_i32_f32(float %f) nounwind {
; X86-LABEL: test_signed_i32_f32:
; X86:       # %bb.0:
; X86-NEXT:    vcvttss2sis {{[0-9]+}}(%esp), %eax
; X86-NEXT:    retl
;
; X64-LABEL: test_signed_i32_f32:
; X64:       # %bb.0:
; X64-NEXT:    vcvttss2sis %xmm0, %eax
; X64-NEXT:    retq
    %x = call i32 @llvm.fptosi.sat.i32.f32(float %f)
    ret i32 %x
}

define i64 @test_signed_i64_f32(float %f) nounwind {
; X86-LABEL: test_signed_i64_f32:
; X86:       # %bb.0:
; X86-NEXT:    pushl %edi
; X86-NEXT:    pushl %esi
; X86-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X86-NEXT:    vcvttps2qq %xmm1, %xmm1
; X86-NEXT:    vmovd %xmm1, %esi
; X86-NEXT:    xorl %ecx, %ecx
; X86-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT:    cmovbl %ecx, %esi
; X86-NEXT:    vpextrd $1, %xmm1, %eax
; X86-NEXT:    movl $-2147483648, %edi # imm = 0x80000000
; X86-NEXT:    cmovael %eax, %edi
; X86-NEXT:    vucomiss {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT:    movl $2147483647, %edx # imm = 0x7FFFFFFF
; X86-NEXT:    cmovbel %edi, %edx
; X86-NEXT:    movl $-1, %eax
; X86-NEXT:    cmovbel %esi, %eax
; X86-NEXT:    vucomiss %xmm0, %xmm0
; X86-NEXT:    cmovpl %ecx, %eax
; X86-NEXT:    cmovpl %ecx, %edx
; X86-NEXT:    popl %esi
; X86-NEXT:    popl %edi
; X86-NEXT:    retl
;
; X64-LABEL: test_signed_i64_f32:
; X64:       # %bb.0:
; X64-NEXT:    vcvttss2sis %xmm0, %rax
; X64-NEXT:    retq
    %x = call i64 @llvm.fptosi.sat.i64.f32(float %f)
    ret i64 %x
}

;
; 64-bit float to signed integer
;

declare  i32 @llvm.fptosi.sat.i32.f64 (double)
declare  i64 @llvm.fptosi.sat.i64.f64 (double)

define i32 @test_signed_i32_f64(double %f) nounwind {
; X86-LABEL: test_signed_i32_f64:
; X86:       # %bb.0:
; X86-NEXT:    vcvttsd2sis {{[0-9]+}}(%esp), %eax
; X86-NEXT:    retl
;
; X64-LABEL: test_signed_i32_f64:
; X64:       # %bb.0:
; X64-NEXT:    vcvttsd2sis %xmm0, %eax
; X64-NEXT:    retq
    %x = call i32 @llvm.fptosi.sat.i32.f64(double %f)
    ret i32 %x
}

define i64 @test_signed_i64_f64(double %f) nounwind {
; X86-LABEL: test_signed_i64_f64:
; X86:       # %bb.0:
; X86-NEXT:    pushl %edi
; X86-NEXT:    pushl %esi
; X86-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
; X86-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
; X86-NEXT:    vcvttpd2qq %xmm1, %xmm1
; X86-NEXT:    vmovd %xmm1, %esi
; X86-NEXT:    xorl %ecx, %ecx
; X86-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT:    cmovbl %ecx, %esi
; X86-NEXT:    vpextrd $1, %xmm1, %eax
; X86-NEXT:    movl $-2147483648, %edi # imm = 0x80000000
; X86-NEXT:    cmovael %eax, %edi
; X86-NEXT:    vucomisd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT:    movl $2147483647, %edx # imm = 0x7FFFFFFF
; X86-NEXT:    cmovbel %edi, %edx
; X86-NEXT:    movl $-1, %eax
; X86-NEXT:    cmovbel %esi, %eax
; X86-NEXT:    vucomisd %xmm0, %xmm0
; X86-NEXT:    cmovpl %ecx, %eax
; X86-NEXT:    cmovpl %ecx, %edx
; X86-NEXT:    popl %esi
; X86-NEXT:    popl %edi
; X86-NEXT:    retl
;
; X64-LABEL: test_signed_i64_f64:
; X64:       # %bb.0:
; X64-NEXT:    vcvttsd2sis %xmm0, %rax
; X64-NEXT:    retq
    %x = call i64 @llvm.fptosi.sat.i64.f64(double %f)
    ret i64 %x
}