//===--- AMDHSAKernelDescriptor.h -----------------------------*- C++ -*---===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // /// \file /// AMDHSA kernel descriptor definitions. For more information, visit /// https://llvm.org/docs/AMDGPUUsage.html#kernel-descriptor /// /// \warning /// Any changes to this file should also be audited for corresponding changes /// needed in both the assembler and disassembler, namely: /// * AMDGPUAsmPrinter.{cpp,h} /// * AMDGPUTargetStreamer.{cpp,h} /// * AMDGPUDisassembler.{cpp,h} // //===----------------------------------------------------------------------===// #ifndef LLVM_SUPPORT_AMDHSAKERNELDESCRIPTOR_H #define LLVM_SUPPORT_AMDHSAKERNELDESCRIPTOR_H #include <cstddef> #include <cstdint> // Gets offset of specified member in specified type. #ifndef offsetof #define offsetof … #endif // offsetof // Creates enumeration entries used for packing bits into integers. Enumeration // entries include bit shift amount, bit width, and bit mask. #ifndef AMDHSA_BITS_ENUM_ENTRY #define AMDHSA_BITS_ENUM_ENTRY(NAME, SHIFT, WIDTH) … #endif // AMDHSA_BITS_ENUM_ENTRY // Gets bits for specified bit mask from specified source. #ifndef AMDHSA_BITS_GET #define AMDHSA_BITS_GET(SRC, MSK) … #endif // AMDHSA_BITS_GET // Sets bits for specified bit mask in specified destination. #ifndef AMDHSA_BITS_SET #define AMDHSA_BITS_SET(DST, MSK, VAL) … #endif // AMDHSA_BITS_SET namespace llvm { namespace amdhsa { // Floating point rounding modes. Must match hardware definition. enum : uint8_t { … }; // Floating point denorm modes. Must match hardware definition. enum : uint8_t { … }; // System VGPR workitem IDs. Must match hardware definition. enum : uint8_t { … }; // Compute program resource register 1. Must match hardware definition. // GFX6+. #define COMPUTE_PGM_RSRC1 … // [GFX6-GFX8]. #define COMPUTE_PGM_RSRC1_GFX6_GFX8(NAME, SHIFT, WIDTH) … // [GFX6-GFX9]. #define COMPUTE_PGM_RSRC1_GFX6_GFX9(NAME, SHIFT, WIDTH) … // [GFX6-GFX11]. #define COMPUTE_PGM_RSRC1_GFX6_GFX11(NAME, SHIFT, WIDTH) … // GFX9+. #define COMPUTE_PGM_RSRC1_GFX9_PLUS(NAME, SHIFT, WIDTH) … // GFX10+. #define COMPUTE_PGM_RSRC1_GFX10_PLUS(NAME, SHIFT, WIDTH) … // GFX12+. #define COMPUTE_PGM_RSRC1_GFX12_PLUS(NAME, SHIFT, WIDTH) … enum : int32_t { … }; #undef COMPUTE_PGM_RSRC1 // Compute program resource register 2. Must match hardware definition. // GFX6+. #define COMPUTE_PGM_RSRC2 … // [GFX6-GFX11]. #define COMPUTE_PGM_RSRC2_GFX6_GFX11(NAME, SHIFT, WIDTH) … // GFX12+. #define COMPUTE_PGM_RSRC2_GFX12_PLUS(NAME, SHIFT, WIDTH) … enum : int32_t { … }; #undef COMPUTE_PGM_RSRC2 // Compute program resource register 3 for GFX90A+. Must match hardware // definition. #define COMPUTE_PGM_RSRC3_GFX90A … enum : int32_t { … }; #undef COMPUTE_PGM_RSRC3_GFX90A // Compute program resource register 3 for GFX10+. Must match hardware // definition. // GFX10+. #define COMPUTE_PGM_RSRC3_GFX10_PLUS … // [GFX10]. #define COMPUTE_PGM_RSRC3_GFX10(NAME, SHIFT, WIDTH) … // [GFX10-GFX11]. #define COMPUTE_PGM_RSRC3_GFX10_GFX11(NAME, SHIFT, WIDTH) … // GFX11+. #define COMPUTE_PGM_RSRC3_GFX11_PLUS(NAME, SHIFT, WIDTH) … // [GFX11]. #define COMPUTE_PGM_RSRC3_GFX11(NAME, SHIFT, WIDTH) … // GFX12+. #define COMPUTE_PGM_RSRC3_GFX12_PLUS(NAME, SHIFT, WIDTH) … enum : int32_t { … }; #undef COMPUTE_PGM_RSRC3_GFX10_PLUS // Kernel code properties. Must be kept backwards compatible. #define KERNEL_CODE_PROPERTY … enum : int32_t { … }; #undef KERNEL_CODE_PROPERTY // Kernarg preload specification. #define KERNARG_PRELOAD_SPEC … enum : int32_t { … }; #undef KERNARG_PRELOAD_SPEC // Kernel descriptor. Must be kept backwards compatible. struct kernel_descriptor_t { … }; enum : uint32_t { … }; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; static_assert …; } // end namespace amdhsa } // end namespace llvm #endif // LLVM_SUPPORT_AMDHSAKERNELDESCRIPTOR_H