BPFGenMCCodeEmitter.inc | Explore in Territory

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Machine Code Emitter                                                       *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

uint64_t BPFMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
    SmallVectorImpl<MCFixup> &Fixups,
    const MCSubtargetInfo &STI) const { … }

#ifdef GET_OPERAND_BIT_OFFSET
#undef GET_OPERAND_BIT_OFFSET

uint32_t BPFMCCodeEmitter::getOperandBitOffset(const MCInst &MI,
    unsigned OpNum,
    const MCSubtargetInfo &STI) const {
  switch (MI.getOpcode()) {
    case BPF::CORE_LD32:
    case BPF::CORE_LD64:
    case BPF::CORE_ST:
    case BPF::NOP:
    case BPF::RET: {
      break;
    }
    case BPF::JAL:
    case BPF::JMPL: {
      switch (OpNum) {
      case 0:
        // op: BrDst
        return 0;
      }
      break;
    }
    case BPF::JCOND:
    case BPF::JMP: {
      switch (OpNum) {
      case 0:
        // op: BrDst
        return 32;
      }
      break;
    }
    case BPF::JALX: {
      switch (OpNum) {
      case 0:
        // op: BrDst
        return 48;
      }
      break;
    }
    case BPF::LDB:
    case BPF::LDB32:
    case BPF::LDBSX:
    case BPF::LDD:
    case BPF::LDH:
    case BPF::LDH32:
    case BPF::LDHSX:
    case BPF::LDW:
    case BPF::LDW32:
    case BPF::LDWSX: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 1:
        // op: addr
        return 32;
      }
      break;
    }
    case BPF::LD_imm64:
    case BPF::MOV_ri:
    case BPF::MOV_ri_32: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 1:
        // op: imm
        return 0;
      }
      break;
    }
    case BPF::JEQ_rr:
    case BPF::JEQ_rr_32:
    case BPF::JNE_rr:
    case BPF::JNE_rr_32:
    case BPF::JSET_rr:
    case BPF::JSET_rr_32:
    case BPF::JSGE_rr:
    case BPF::JSGE_rr_32:
    case BPF::JSGT_rr:
    case BPF::JSGT_rr_32:
    case BPF::JSLE_rr:
    case BPF::JSLE_rr_32:
    case BPF::JSLT_rr:
    case BPF::JSLT_rr_32:
    case BPF::JUGE_rr:
    case BPF::JUGE_rr_32:
    case BPF::JUGT_rr:
    case BPF::JUGT_rr_32:
    case BPF::JULE_rr:
    case BPF::JULE_rr_32:
    case BPF::JULT_rr:
    case BPF::JULT_rr_32: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 1:
        // op: src
        return 52;
      case 2:
        // op: BrDst
        return 32;
      }
      break;
    }
    case BPF::ADDR_SPACE_CAST: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 1:
        // op: src
        return 52;
      case 2:
        // op: dst_as
        return 16;
      case 3:
        // op: src_as
        return 0;
      }
      break;
    }
    case BPF::MOVSX_rr_8:
    case BPF::MOVSX_rr_16:
    case BPF::MOVSX_rr_32:
    case BPF::MOVSX_rr_32_8:
    case BPF::MOVSX_rr_32_16:
    case BPF::MOV_32_64:
    case BPF::MOV_rr:
    case BPF::MOV_rr_32: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 1:
        // op: src
        return 52;
      }
      break;
    }
    case BPF::JEQ_ri:
    case BPF::JEQ_ri_32:
    case BPF::JNE_ri:
    case BPF::JNE_ri_32:
    case BPF::JSET_ri:
    case BPF::JSET_ri_32:
    case BPF::JSGE_ri:
    case BPF::JSGE_ri_32:
    case BPF::JSGT_ri:
    case BPF::JSGT_ri_32:
    case BPF::JSLE_ri:
    case BPF::JSLE_ri_32:
    case BPF::JSLT_ri:
    case BPF::JSLT_ri_32:
    case BPF::JUGE_ri:
    case BPF::JUGE_ri_32:
    case BPF::JUGT_ri:
    case BPF::JUGT_ri_32:
    case BPF::JULE_ri:
    case BPF::JULE_ri_32:
    case BPF::JULT_ri:
    case BPF::JULT_ri_32: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 2:
        // op: BrDst
        return 32;
      case 1:
        // op: imm
        return 0;
      }
      break;
    }
    case BPF::LD_pseudo: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 2:
        // op: imm
        return 0;
      case 1:
        // op: pseudo
        return 52;
      }
      break;
    }
    case BPF::ADD_ri:
    case BPF::ADD_ri_32:
    case BPF::AND_ri:
    case BPF::AND_ri_32:
    case BPF::DIV_ri:
    case BPF::DIV_ri_32:
    case BPF::MOD_ri:
    case BPF::MOD_ri_32:
    case BPF::MUL_ri:
    case BPF::MUL_ri_32:
    case BPF::OR_ri:
    case BPF::OR_ri_32:
    case BPF::SDIV_ri:
    case BPF::SDIV_ri_32:
    case BPF::SLL_ri:
    case BPF::SLL_ri_32:
    case BPF::SMOD_ri:
    case BPF::SMOD_ri_32:
    case BPF::SRA_ri:
    case BPF::SRA_ri_32:
    case BPF::SRL_ri:
    case BPF::SRL_ri_32:
    case BPF::SUB_ri:
    case BPF::SUB_ri_32:
    case BPF::XOR_ri:
    case BPF::XOR_ri_32: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 2:
        // op: imm
        return 0;
      }
      break;
    }
    case BPF::ADD_rr:
    case BPF::ADD_rr_32:
    case BPF::AND_rr:
    case BPF::AND_rr_32:
    case BPF::CORE_SHIFT:
    case BPF::DIV_rr:
    case BPF::DIV_rr_32:
    case BPF::MOD_rr:
    case BPF::MOD_rr_32:
    case BPF::MUL_rr:
    case BPF::MUL_rr_32:
    case BPF::OR_rr:
    case BPF::OR_rr_32:
    case BPF::SDIV_rr:
    case BPF::SDIV_rr_32:
    case BPF::SLL_rr:
    case BPF::SLL_rr_32:
    case BPF::SMOD_rr:
    case BPF::SMOD_rr_32:
    case BPF::SRA_rr:
    case BPF::SRA_rr_32:
    case BPF::SRL_rr:
    case BPF::SRL_rr_32:
    case BPF::SUB_rr:
    case BPF::SUB_rr_32:
    case BPF::XOR_rr:
    case BPF::XOR_rr_32: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      case 2:
        // op: src
        return 52;
      }
      break;
    }
    case BPF::BE16:
    case BPF::BE32:
    case BPF::BE64:
    case BPF::BSWAP16:
    case BPF::BSWAP32:
    case BPF::BSWAP64:
    case BPF::LE16:
    case BPF::LE32:
    case BPF::LE64:
    case BPF::NEG_32:
    case BPF::NEG_64: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 48;
      }
      break;
    }
    case BPF::XADDD:
    case BPF::XADDW:
    case BPF::XADDW32:
    case BPF::XANDD:
    case BPF::XANDW32:
    case BPF::XCHGD:
    case BPF::XCHGW32:
    case BPF::XFADDD:
    case BPF::XFADDW32:
    case BPF::XFANDD:
    case BPF::XFANDW32:
    case BPF::XFORD:
    case BPF::XFORW32:
    case BPF::XFXORD:
    case BPF::XFXORW32:
    case BPF::XORD:
    case BPF::XORW32:
    case BPF::XXORD:
    case BPF::XXORW32: {
      switch (OpNum) {
      case 0:
        // op: dst
        return 52;
      case 1:
        // op: addr
        return 32;
      }
      break;
    }
    case BPF::STB:
    case BPF::STB32:
    case BPF::STD:
    case BPF::STH:
    case BPF::STH32:
    case BPF::STW:
    case BPF::STW32: {
      switch (OpNum) {
      case 0:
        // op: src
        return 52;
      case 1:
        // op: addr
        return 32;
      }
      break;
    }
    case BPF::STB_imm:
    case BPF::STD_imm:
    case BPF::STH_imm:
    case BPF::STW_imm: {
      switch (OpNum) {
      case 1:
        // op: addr
        return 32;
      case 0:
        // op: imm
        return 0;
      }
      break;
    }
    case BPF::LD_ABS_B:
    case BPF::LD_ABS_H:
    case BPF::LD_ABS_W: {
      switch (OpNum) {
      case 1:
        // op: imm
        return 0;
      }
      break;
    }
    case BPF::LD_IND_B:
    case BPF::LD_IND_H:
    case BPF::LD_IND_W: {
      switch (OpNum) {
      case 1:
        // op: val
        return 52;
      }
      break;
    }
    case BPF::CMPXCHGD:
    case BPF::CMPXCHGW32: {
      switch (OpNum) {
      case 2:
        // op: new
        return 52;
      case 0:
        // op: addr
        return 32;
      }
      break;
    }
  }
  std::string msg;
  raw_string_ostream Msg(msg);
  Msg << "Not supported instr[opcode]: " << MI << "[" << OpNum << "]";
  report_fatal_error(Msg.str().c_str());
}

#endif // GET_OPERAND_BIT_OFFSET
llvm/lib/Target/BPF/BPFGenMCCodeEmitter.inc
