llvm/lib/Target/RISCV/RISCVGenMCPseudoLowering.inc

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Pseudo-instruction MC lowering Source Fragment                             *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

bool RISCVAsmPrinter::
lowerPseudoInstExpansion(const MachineInstr *MI, MCInst &Inst) { … }