llvm/lib/Target/RISCV/RISCVGenAsmWriter.inc

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Assembly Writer Source Fragment                                            *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|* From: RISCV.td                                                             *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

/// getMnemonic - This method is automatically generated by tablegen
/// from the instruction set description.
std::pair<const char *, uint64_t> RISCVInstPrinter::getMnemonic(const MCInst *MI) { … }
/// printInstruction - This method is automatically generated by tablegen
/// from the instruction set description.
LLVM_NO_PROFILE_INSTRUMENT_FUNCTION
void RISCVInstPrinter::printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O) { … }


/// getRegisterName - This method is automatically generated by tblgen
/// from the register set description.  This returns the assembler name
/// for the specified register.
const char *RISCVInstPrinter::
getRegisterName(MCRegister Reg, unsigned AltIdx) { … }

#ifdef PRINT_ALIAS_INSTR
#undef PRINT_ALIAS_INSTR

static bool RISCVInstPrinterValidateMCOperand(const MCOperand &MCOp,
                  const MCSubtargetInfo &STI,
                  unsigned PredicateIndex);
bool RISCVInstPrinter::printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &OS) { … }

void RISCVInstPrinter::printCustomAliasOperand(
         const MCInst *MI, uint64_t Address, unsigned OpIdx,
         unsigned PrintMethodIdx,
         const MCSubtargetInfo &STI,
         raw_ostream &OS) { … }

static bool RISCVInstPrinterValidateMCOperand(const MCOperand &MCOp,
                  const MCSubtargetInfo &STI,
                  unsigned PredicateIndex) { … }

#endif // PRINT_ALIAS_INSTR