extracts-from-scalarizable-vector.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -S -passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s

define i1 @degenerate() {
; CHECK-LABEL: define i1 @degenerate() {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[TMP0:%.*]] = extractelement <4 x fp128> zeroinitializer, i32 0
; CHECK-NEXT:    [[CMP:%.*]] = fcmp ogt fp128 [[TMP0]], 0xL00000000000000000000000000000000
; CHECK-NEXT:    [[CMP3:%.*]] = fcmp olt fp128 [[TMP0]], 0xL00000000000000000000000000000000
; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[CMP]], [[CMP3]]
; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x fp128> zeroinitializer, i32 0
; CHECK-NEXT:    [[CMP6:%.*]] = fcmp ogt fp128 [[TMP1]], 0xL00000000000000000000000000000000
; CHECK-NEXT:    [[OR_COND29:%.*]] = select i1 [[OR_COND]], i1 [[CMP6]], i1 false
; CHECK-NEXT:    [[CMP10:%.*]] = fcmp olt fp128 [[TMP1]], 0xL00000000000000000000000000000000
; CHECK-NEXT:    [[OR_COND30:%.*]] = select i1 [[OR_COND29]], i1 [[CMP10]], i1 false
; CHECK-NEXT:    ret i1 [[OR_COND30]]
;
entry:
  %0 = extractelement <4 x fp128> zeroinitializer, i32 0
  %cmp = fcmp ogt fp128 %0, 0xL00000000000000000000000000000000
  %cmp3 = fcmp olt fp128 %0, 0xL00000000000000000000000000000000
  %or.cond = and i1 %cmp, %cmp3
  %1 = extractelement <4 x fp128> zeroinitializer, i32 0
  %cmp6 = fcmp ogt fp128 %1, 0xL00000000000000000000000000000000
  %or.cond29 = select i1 %or.cond, i1 %cmp6, i1 false
  %cmp10 = fcmp olt fp128 %1, 0xL00000000000000000000000000000000
  %or.cond30 = select i1 %or.cond29, i1 %cmp10, i1 false
  ret i1 %or.cond30
}

define i1 @with_inputs(<4 x fp128> %a) {
; CHECK-LABEL: define i1 @with_inputs
; CHECK-SAME: (<4 x fp128> [[A:%.*]]) {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[TMP0:%.*]] = extractelement <4 x fp128> [[A]], i32 0
; CHECK-NEXT:    [[CMP:%.*]] = fcmp ogt fp128 [[TMP0]], 0xL00000000000000000000000000000000
; CHECK-NEXT:    [[CMP3:%.*]] = fcmp olt fp128 [[TMP0]], 0xL00000000000000000000000000000000
; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[CMP]], [[CMP3]]
; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <4 x fp128> [[A]], i32 1
; CHECK-NEXT:    [[CMP6:%.*]] = fcmp ogt fp128 [[TMP1]], 0xL00000000000000000000000000000000
; CHECK-NEXT:    [[OR_COND29:%.*]] = select i1 [[OR_COND]], i1 [[CMP6]], i1 false
; CHECK-NEXT:    [[CMP10:%.*]] = fcmp olt fp128 [[TMP1]], 0xL00000000000000000000000000000000
; CHECK-NEXT:    [[OR_COND30:%.*]] = select i1 [[OR_COND29]], i1 [[CMP10]], i1 false
; CHECK-NEXT:    ret i1 [[OR_COND30]]
;
entry:
  %0 = extractelement <4 x fp128> %a, i32 0
  %cmp = fcmp ogt fp128 %0, 0xL00000000000000000000000000000000
  %cmp3 = fcmp olt fp128 %0, 0xL00000000000000000000000000000000
  %or.cond = and i1 %cmp, %cmp3
  %1 = extractelement <4 x fp128> %a, i32 1
  %cmp6 = fcmp ogt fp128 %1, 0xL00000000000000000000000000000000
  %or.cond29 = select i1 %or.cond, i1 %cmp6, i1 false
  %cmp10 = fcmp olt fp128 %1, 0xL00000000000000000000000000000000
  %or.cond30 = select i1 %or.cond29, i1 %cmp10, i1 false
  ret i1 %or.cond30
}
llvm/llvm/test/Transforms/SLPVectorizer/AArch64/extracts-from-scalarizable-vector.ll
