; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt -S -passes=slp-vectorizer -mtriple=riscv64-unknown-linux-gnu -mattr=+v < %s | FileCheck %s
define i32 @test(ptr %p) {
; CHECK-LABEL: define i32 @test(
; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[D_0:%.*]] = load i16, ptr [[P]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> <i16 poison, i16 0, i16 0, i16 0>, i16 [[D_0]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = or <4 x i16> [[TMP0]], zeroinitializer
; CHECK-NEXT: [[TMP2:%.*]] = and <4 x i16> [[TMP1]], zeroinitializer
; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP0]] to <4 x i32>
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
; CHECK-NEXT: [[TMP5:%.*]] = icmp sgt <4 x i32> [[TMP4]], zeroinitializer
; CHECK-NEXT: [[TMP6:%.*]] = select <4 x i1> [[TMP5]], <4 x i16> [[TMP2]], <4 x i16> <i16 2, i16 0, i16 0, i16 0>
; CHECK-NEXT: [[TMP7:%.*]] = call i16 @llvm.vector.reduce.umax.v4i16(<4 x i16> [[TMP6]])
; CHECK-NEXT: [[TMP8:%.*]] = zext i16 [[TMP7]] to i32
; CHECK-NEXT: [[TMP9:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP8]], i32 1)
; CHECK-NEXT: ret i32 [[TMP9]]
;
entry:
%d.0 = load i16, ptr %p, align 4
%zext.d.0 = zext i16 %d.0 to i32
%zero.0 = zext i16 0 to i32
%zero.1 = zext i16 0 to i32
%zero.2 = zext i16 0 to i32
%or.d.0 = or i32 %zext.d.0, 0
%or.zero.0 = or i32 %zero.0, 0
%or.zero.1 = or i32 %zero.1, 0
%or.zero.2 = or i32 %zero.2, 0
%zero.d.0 = and i32 %or.d.0, 0
%and.zero.0 = and i32 %or.zero.0, 0
%and.zero.1 = and i32 %or.zero.1, 0
%and.zero.2 = and i32 %or.zero.2, 0
%d.0.gt.0 = icmp sgt i32 %zext.d.0, 0
%false.0 = icmp sgt i32 0, 0
%false.1 = icmp sgt i32 0, 0
%false.2 = icmp sgt i32 0, 0
%select.0.2 = select i1 %d.0.gt.0, i32 %zero.d.0, i32 2
%select.1.0 = select i1 %false.0, i32 %and.zero.0, i32 0
%select.2.0 = select i1 %false.1, i32 %and.zero.1, i32 0
%select.3.0 = select i1 %false.2, i32 %and.zero.2, i32 0
%max.0 = call i32 @llvm.umax.i32(i32 %select.0.2, i32 %select.1.0)
%max.1 = call i32 @llvm.umax.i32(i32 %max.0, i32 %select.2.0)
%max.2 = call i32 @llvm.umax.i32(i32 %max.1, i32 %select.3.0)
%max.3 = call i32 @llvm.umax.i32(i32 %max.2, i32 1)
ret i32 %max.3
}
define i32 @test1(ptr %p) {
; CHECK-LABEL: define i32 @test1(
; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[D_0:%.*]] = load i16, ptr [[P]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i16> <i16 poison, i16 0, i16 0, i16 0>, i16 [[D_0]], i32 0
; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i16> [[TMP0]] to <4 x i32>
; CHECK-NEXT: [[TMP2:%.*]] = or <4 x i32> [[TMP3]], zeroinitializer
; CHECK-NEXT: [[TMP6:%.*]] = and <4 x i32> [[TMP2]], <i32 -1, i32 -16383, i32 65535, i32 -1>
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> <i32 -1, i32 -16383, i32 65535, i32 -1>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <4 x i32> [[TMP4]], <i32 65535, i32 -16383, i32 65535, i32 65535>
; CHECK-NEXT: [[TMP7:%.*]] = select <4 x i1> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> <i32 4, i32 3, i32 2, i32 1>
; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP7]])
; CHECK-NEXT: ret i32 [[TMP8]]
;
entry:
%d.0 = load i16, ptr %p, align 4
%zext.d.0 = zext i16 %d.0 to i32
%zero.0 = zext i16 0 to i32
%zero.1 = zext i16 0 to i32
%zero.2 = zext i16 0 to i32
%or.d.0 = or i32 %zext.d.0, 0
%or.zero.0 = or i32 %zero.0, 0
%or.zero.1 = or i32 %zero.1, 0
%or.zero.2 = or i32 %zero.2, 0
%szero.00 = sext i16 65535 to i32
%szero.0 = sext i16 -16383 to i32
%uzero.1 = zext i16 65535 to i32
%szero.2 = sext i16 65535 to i32
%zero.d.0 = and i32 %or.d.0, %szero.00
%and.zero.0 = and i32 %or.zero.0, %szero.0
%and.zero.1 = and i32 %or.zero.1, %uzero.1
%and.zero.2 = and i32 %or.zero.2, %szero.2
%d.0.gt.0 = icmp eq i32 %zext.d.0, 65535
%false.0 = icmp eq i32 %szero.0, -16383
%false.1 = icmp eq i32 %uzero.1, 65535
%false.2 = icmp eq i32 %szero.2, 65535
%select.0.2 = select i1 %d.0.gt.0, i32 %zero.d.0, i32 4
%select.1.0 = select i1 %false.0, i32 %and.zero.0, i32 3
%select.2.0 = select i1 %false.1, i32 %and.zero.1, i32 2
%select.3.0 = select i1 %false.2, i32 %and.zero.2, i32 1
%max.0 = add i32 %select.0.2, %select.1.0
%max.1 = add i32 %max.0, %select.2.0
%max.2 = add i32 %max.1, %select.3.0
ret i32 %max.2
}
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