# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=atom -instruction-tables < %s | FileCheck %s
cmpxchg8b (%rax)
cmpxchg16b (%rax)
lock cmpxchg8b (%rax)
lock cmpxchg16b (%rax)
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 18 9.00 * * cmpxchg8b (%rax)
# CHECK-NEXT: 1 22 11.00 * * cmpxchg16b (%rax)
# CHECK-NEXT: 1 18 9.00 * * lock cmpxchg8b (%rax)
# CHECK-NEXT: 1 22 11.00 * * lock cmpxchg16b (%rax)
# CHECK: Resources:
# CHECK-NEXT: [0] - AtomPort0
# CHECK-NEXT: [1] - AtomPort1
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1]
# CHECK-NEXT: 40.00 40.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] Instructions:
# CHECK-NEXT: 9.00 9.00 cmpxchg8b (%rax)
# CHECK-NEXT: 11.00 11.00 cmpxchg16b (%rax)
# CHECK-NEXT: 9.00 9.00 lock cmpxchg8b (%rax)
# CHECK-NEXT: 11.00 11.00 lock cmpxchg16b (%rax)