llvm/llvm/test/CodeGen/AMDGPU/fold-over-exec.mir

# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck %s

# CHECK-LABEL: bb.2:
# CHECK: %I_out
# CHECK-NOT: %I
---
name:            main
tracksRegLiveness: true
body:             |
  bb.0:
    successors: %bb.1(0x80000000)
    liveins: $sgpr0, $vgpr0, $vgpr1
    %0:sreg_32 = S_MOV_B32 0
    %1:sreg_64 = S_MOV_B64 0
    %tid_x:vgpr_32 = COPY $vgpr0
    %tid_y:vgpr_32 = COPY $vgpr1
    %arg:sgpr_32 = COPY $sgpr0

  bb.1: ; loop
    successors: %bb.2(0x40000000), %bb.1(0x40000000)
    %I:sreg_32 = PHI %0, %bb.0, %I_inc, %bb.1
    %break_inc:sreg_64 = PHI %1, %bb.0, %break, %bb.1
    %cond:sreg_64 = V_CMP_LE_U32_e64 %arg, %tid_x, implicit $exec
    %break:sreg_64 = SI_IF_BREAK %cond, %break_inc, implicit-def $scc
    %I_out:vgpr_32 = COPY %I, implicit $exec
    %I_inc:sreg_32 = S_ADD_I32 %I, 1, implicit-def $scc
    SI_LOOP %break, %bb.1, implicit-def dead $exec, implicit $exec, implicit-def $scc
    S_BRANCH %bb.2

  bb.2: ; end loop
    successors: %bb.3(0x40000000)
    %2:sreg_64_xexec = V_CMP_EQ_U32_e64 %I_out, %tid_y, implicit $exec
    %3:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, killed %2, implicit $exec
    S_BRANCH %bb.3

  bb.3: ; exit
    S_ENDPGM 0
...