llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s

---
name: ps_live
legalized: true

body: |
  bb.0:
    ; CHECK-LABEL: name: ps_live
    ; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.ps.live)
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[INT]](s1)
    %0:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.ps.live)
    S_ENDPGM 0, implicit %0
...