llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=WAVE64 %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -run-pass=legalizer %s -o - | FileCheck -check-prefix=WAVE32 %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -run-pass=legalizer %s -o - | FileCheck -check-prefix=WAVE32 %s

---
name: test_wavefrontsize
body: |
  bb.0:

    ; WAVE64-LABEL: name: test_wavefrontsize
    ; WAVE64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
    ; WAVE64-NEXT: $vgpr0 = COPY [[C]](s32)
    ; WAVE32-LABEL: name: test_wavefrontsize
    ; WAVE32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; WAVE32-NEXT: $vgpr0 = COPY [[C]](s32)
    %0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wavefrontsize)
    $vgpr0 = COPY %0
...