llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-- -run-pass=legalizer -verify-machineinstrs -o - %s | FileCheck %s

---
name:            memset_test
body:             |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2

    ; CHECK-LABEL: name: memset_test
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s8) = COPY [[TRUNC]](s8)
    ; CHECK-NEXT: G_STORE [[COPY2]](s32), [[MV]](p0) :: (store (s8))
    ; CHECK-NEXT: S_ENDPGM 0
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = COPY $vgpr1
    %2:_(p0) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
    %3:_(s32) = COPY $vgpr2
    %4:_(s16) = G_TRUNC %3:_(s32)
    %5:_(s8) = G_TRUNC %4:_(s16)
    %6:_(s32) = G_CONSTANT i32 1
    %7:_(s64) = G_ZEXT %6:_(s32)
    G_MEMSET %2:_(p0), %5:_(s8), %7:_(s64), 0 :: (store (s8))
    S_ENDPGM 0

...