inst-select-scalar-float-sopc.mir | Explore in Territory

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s

---
name:            f32_olt
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_olt
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_LT_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(olt), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_oeq
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_oeq
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_EQ_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(oeq), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_ole
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_ole
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_LE_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(ole), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_ogt
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_ogt
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_GT_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(ogt), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_one
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_one
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_LG_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(one), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_oge
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_oge
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_GE_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(oge), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_ord
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_ord
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_O_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(ord), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_uno
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_uno
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_U_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(uno), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_ult
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_ult
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NGE_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(ult), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_ueq
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_ueq
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NLG_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(ueq), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_ule
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_ule
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NGT_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(ule), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_ugt
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_ugt
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NLE_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(ugt), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_une
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_une
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NEQ_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(une), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f32_uge
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_uge
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NLT_F32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_FCMP floatpred(uge), %0(s32), %1
    $sgpr0 = COPY %2(s32)

...
---
name:            f16_olt
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_olt
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_LT_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(olt), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_oeq
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_oeq
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_EQ_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(oeq), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_ole
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_ole
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_LE_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(ole), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_ogt
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_ogt
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_GT_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(ogt), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_one
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_one
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_LG_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(one), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_oge
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_oge
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_GE_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(oge), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_ord
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_ord
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_O_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(ord), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_uno
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_uno
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_U_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(uno), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_ult
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_ult
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NGE_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(ult), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_ueq
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_ueq
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NLG_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(ueq), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_ule
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_ule
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NGT_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(ule), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_ugt
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_ugt
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NLE_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(ugt), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_une
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_une
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NEQ_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(une), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
---
name:            f16_uge
legalized:       true
regBankSelected: true
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_uge
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX1150-NEXT: S_CMP_NLT_F16 [[COPY]], [[COPY1]], implicit-def $scc, implicit $mode
    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
    ; GFX1150-NEXT: $sgpr0 = COPY [[COPY2]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s16) = G_TRUNC %0(s32)
    %2:sgpr(s32) = COPY $sgpr1
    %3:sgpr(s16) = G_TRUNC %2(s32)
    %4:sgpr(s32) = G_FCMP floatpred(uge), %1(s16), %3
    $sgpr0 = COPY %4(s32)

...
llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sopc.mir
