llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX6 %s
# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX7 %s
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX8 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX10 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX10 %s

---
name: lshr_s32_ss
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0, $sgpr1
    ; GFX6-LABEL: name: lshr_s32_ss
    ; GFX6: liveins: $sgpr0, $sgpr1
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX6-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX6-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX6-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
    ;
    ; GFX7-LABEL: name: lshr_s32_ss
    ; GFX7: liveins: $sgpr0, $sgpr1
    ; GFX7-NEXT: {{  $}}
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX7-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX7-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
    ;
    ; GFX8-LABEL: name: lshr_s32_ss
    ; GFX8: liveins: $sgpr0, $sgpr1
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX8-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX8-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
    ;
    ; GFX9-LABEL: name: lshr_s32_ss
    ; GFX9: liveins: $sgpr0, $sgpr1
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX9-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
    ;
    ; GFX10-LABEL: name: lshr_s32_ss
    ; GFX10: liveins: $sgpr0, $sgpr1
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
    ; GFX10-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B32_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:sgpr(s32) = COPY $sgpr1
    %2:sgpr(s32) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: lshr_s32_sv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0, $vgpr0
    ; GFX6-LABEL: name: lshr_s32_sv
    ; GFX6: liveins: $sgpr0, $vgpr0
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX6-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX6-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX7-LABEL: name: lshr_s32_sv
    ; GFX7: liveins: $sgpr0, $vgpr0
    ; GFX7-NEXT: {{  $}}
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX7-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX7-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX8-LABEL: name: lshr_s32_sv
    ; GFX8: liveins: $sgpr0, $vgpr0
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX8-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX9-LABEL: name: lshr_s32_sv
    ; GFX9: liveins: $sgpr0, $vgpr0
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX10-LABEL: name: lshr_s32_sv
    ; GFX10: liveins: $sgpr0, $vgpr0
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX10-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    %0:sgpr(s32) = COPY $sgpr0
    %1:vgpr(s32) = COPY $vgpr0
    %2:vgpr(s32) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: lshr_s32_vs
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0, $vgpr0
    ; GFX6-LABEL: name: lshr_s32_vs
    ; GFX6: liveins: $sgpr0, $vgpr0
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX6-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX6-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX6-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX7-LABEL: name: lshr_s32_vs
    ; GFX7: liveins: $sgpr0, $vgpr0
    ; GFX7-NEXT: {{  $}}
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX7-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX7-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX8-LABEL: name: lshr_s32_vs
    ; GFX8: liveins: $sgpr0, $vgpr0
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX8-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX9-LABEL: name: lshr_s32_vs
    ; GFX9: liveins: $sgpr0, $vgpr0
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX9-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX10-LABEL: name: lshr_s32_vs
    ; GFX10: liveins: $sgpr0, $vgpr0
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX10-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:sgpr(s32) = COPY $sgpr0
    %2:vgpr(s32) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: lshr_s32_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; GFX6-LABEL: name: lshr_s32_vv
    ; GFX6: liveins: $vgpr0, $vgpr1
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; GFX6-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX6-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX7-LABEL: name: lshr_s32_vv
    ; GFX7: liveins: $vgpr0, $vgpr1
    ; GFX7-NEXT: {{  $}}
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; GFX7-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX7-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX8-LABEL: name: lshr_s32_vv
    ; GFX8: liveins: $vgpr0, $vgpr1
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; GFX8-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX9-LABEL: name: lshr_s32_vv
    ; GFX9: liveins: $vgpr0, $vgpr1
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; GFX9-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    ;
    ; GFX10-LABEL: name: lshr_s32_vv
    ; GFX10: liveins: $vgpr0, $vgpr1
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; GFX10-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: lshr_s64_ss
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1, $sgpr2
    ; GFX6-LABEL: name: lshr_s64_ss
    ; GFX6: liveins: $sgpr0_sgpr1, $sgpr2
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX6-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GFX6-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX6-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
    ;
    ; GFX7-LABEL: name: lshr_s64_ss
    ; GFX7: liveins: $sgpr0_sgpr1, $sgpr2
    ; GFX7-NEXT: {{  $}}
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GFX7-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX7-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
    ;
    ; GFX8-LABEL: name: lshr_s64_ss
    ; GFX8: liveins: $sgpr0_sgpr1, $sgpr2
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GFX8-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX8-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
    ;
    ; GFX9-LABEL: name: lshr_s64_ss
    ; GFX9: liveins: $sgpr0_sgpr1, $sgpr2
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GFX9-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
    ;
    ; GFX10-LABEL: name: lshr_s64_ss
    ; GFX10: liveins: $sgpr0_sgpr1, $sgpr2
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
    ; GFX10-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B64_]]
    %0:sgpr(s64) = COPY $sgpr0_sgpr1
    %1:sgpr(s32) = COPY $sgpr2
    %2:sgpr(s64) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: lshr_s64_sv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1, $vgpr0
    ; GFX6-LABEL: name: lshr_s64_sv
    ; GFX6: liveins: $sgpr0_sgpr1, $vgpr0
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX6-NEXT: [[V_LSHR_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHR_B64_e64 [[COPY]], [[COPY1]], implicit $exec
    ; GFX6-NEXT: S_ENDPGM 0, implicit [[V_LSHR_B64_e64_]]
    ;
    ; GFX7-LABEL: name: lshr_s64_sv
    ; GFX7: liveins: $sgpr0_sgpr1, $vgpr0
    ; GFX7-NEXT: {{  $}}
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX7-NEXT: [[V_LSHR_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHR_B64_e64 [[COPY]], [[COPY1]], implicit $exec
    ; GFX7-NEXT: S_ENDPGM 0, implicit [[V_LSHR_B64_e64_]]
    ;
    ; GFX8-LABEL: name: lshr_s64_sv
    ; GFX8: liveins: $sgpr0_sgpr1, $vgpr0
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX8-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    ;
    ; GFX9-LABEL: name: lshr_s64_sv
    ; GFX9: liveins: $sgpr0_sgpr1, $vgpr0
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    ;
    ; GFX10-LABEL: name: lshr_s64_sv
    ; GFX10: liveins: $sgpr0_sgpr1, $vgpr0
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX10-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    %0:sgpr(s64) = COPY $sgpr0_sgpr1
    %1:vgpr(s32) = COPY $vgpr0
    %2:vgpr(s64) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: lshr_s64_vs
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0, $vgpr0_vgpr1
    ; GFX6-LABEL: name: lshr_s64_vs
    ; GFX6: liveins: $sgpr0, $vgpr0_vgpr1
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX6-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX6-NEXT: [[V_LSHR_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHR_B64_e64 [[COPY]], [[COPY1]], implicit $exec
    ; GFX6-NEXT: S_ENDPGM 0, implicit [[V_LSHR_B64_e64_]]
    ;
    ; GFX7-LABEL: name: lshr_s64_vs
    ; GFX7: liveins: $sgpr0, $vgpr0_vgpr1
    ; GFX7-NEXT: {{  $}}
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX7-NEXT: [[V_LSHR_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHR_B64_e64 [[COPY]], [[COPY1]], implicit $exec
    ; GFX7-NEXT: S_ENDPGM 0, implicit [[V_LSHR_B64_e64_]]
    ;
    ; GFX8-LABEL: name: lshr_s64_vs
    ; GFX8: liveins: $sgpr0, $vgpr0_vgpr1
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX8-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    ;
    ; GFX9-LABEL: name: lshr_s64_vs
    ; GFX9: liveins: $sgpr0, $vgpr0_vgpr1
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX9-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    ;
    ; GFX10-LABEL: name: lshr_s64_vs
    ; GFX10: liveins: $sgpr0, $vgpr0_vgpr1
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX10-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    %0:vgpr(s64) = COPY $vgpr0_vgpr1
    %1:sgpr(s32) = COPY $sgpr0
    %2:vgpr(s64) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: lshr_s64_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2
    ; GFX6-LABEL: name: lshr_s64_vv
    ; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; GFX6-NEXT: [[V_LSHR_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHR_B64_e64 [[COPY]], [[COPY1]], implicit $exec
    ; GFX6-NEXT: S_ENDPGM 0, implicit [[V_LSHR_B64_e64_]]
    ;
    ; GFX7-LABEL: name: lshr_s64_vv
    ; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
    ; GFX7-NEXT: {{  $}}
    ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; GFX7-NEXT: [[V_LSHR_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHR_B64_e64 [[COPY]], [[COPY1]], implicit $exec
    ; GFX7-NEXT: S_ENDPGM 0, implicit [[V_LSHR_B64_e64_]]
    ;
    ; GFX8-LABEL: name: lshr_s64_vv
    ; GFX8: liveins: $vgpr0_vgpr1, $vgpr2
    ; GFX8-NEXT: {{  $}}
    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; GFX8-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    ;
    ; GFX9-LABEL: name: lshr_s64_vv
    ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; GFX9-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    ;
    ; GFX10-LABEL: name: lshr_s64_vv
    ; GFX10: liveins: $vgpr0_vgpr1, $vgpr2
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
    ; GFX10-NEXT: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHRREV_B64_e64 [[COPY1]], [[COPY]], implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B64_e64_]]
    %0:vgpr(s64) = COPY $vgpr0_vgpr1
    %1:vgpr(s32) = COPY $vgpr2
    %2:vgpr(s64) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...