combine-zext-trunc.mir | Explore in Territory

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s

---
name: zext_trunc_s32_s16_s32
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: zext_trunc_s32_s16_s32
    ; GCN: liveins: $vgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: %var:_(s32) = COPY $vgpr0
    ; GCN-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC %var(s32)
    ; GCN-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 16383
    ; GCN-NEXT: %trunc:_(s16) = G_AND [[TRUNC]], [[C]]
    ; GCN-NEXT: %zext:_(s32) = G_ZEXT %trunc(s16)
    ; GCN-NEXT: $vgpr0 = COPY %zext(s32)
    %var:_(s32) = COPY $vgpr0
    %c3FFF:_(s32) = G_CONSTANT i32 16383
    %low_bits:_(s32) = G_AND %var, %c3FFF
    %trunc:_(s16) = G_TRUNC %low_bits(s32)
    %zext:_(s32) = G_ZEXT %trunc(s16)
    $vgpr0 = COPY %zext(s32)
...

---
name: zext_trunc_s32_s16_s32_unknown_high_bits
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: zext_trunc_s32_s16_s32_unknown_high_bits
    ; GCN: liveins: $vgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: %var:_(s32) = COPY $vgpr0
    ; GCN-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC %var(s32)
    ; GCN-NEXT: %zext:_(s32) = G_ZEXT [[TRUNC]](s16)
    ; GCN-NEXT: $vgpr0 = COPY %zext(s32)
    %var:_(s32) = COPY $vgpr0
    %cFFFFF:_(s32) = G_CONSTANT i32 1048575
    %low_bits:_(s32) = G_AND %var, %cFFFFF
    %trunc:_(s16) = G_TRUNC %low_bits(s32)
    %zext:_(s32) = G_ZEXT %trunc(s16)
    $vgpr0 = COPY %zext(s32)
...

---
name: zext_trunc_s64_s16_s32
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GCN-LABEL: name: zext_trunc_s64_s16_s32
    ; GCN: liveins: $vgpr0_vgpr1
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: %var:_(s64) = COPY $vgpr0_vgpr1
    ; GCN-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC %var(s64)
    ; GCN-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 16383
    ; GCN-NEXT: %trunc:_(s16) = G_AND [[TRUNC]], [[C]]
    ; GCN-NEXT: %zext:_(s32) = G_ZEXT %trunc(s16)
    ; GCN-NEXT: $vgpr0 = COPY %zext(s32)
    %var:_(s64) = COPY $vgpr0_vgpr1
    %c3FFF:_(s64) = G_CONSTANT i64 16383
    %low_bits:_(s64) = G_AND %var, %c3FFF
    %trunc:_(s16) = G_TRUNC %low_bits(s64)
    %zext:_(s32) = G_ZEXT %trunc(s16)
    $vgpr0 = COPY %zext(s32)
...

---
name: zext_trunc_s32_s16_s64
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0

    ; GCN-LABEL: name: zext_trunc_s32_s16_s64
    ; GCN: liveins: $vgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: %var:_(s32) = COPY $vgpr0
    ; GCN-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC %var(s32)
    ; GCN-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 16383
    ; GCN-NEXT: %trunc:_(s16) = G_AND [[TRUNC]], [[C]]
    ; GCN-NEXT: %zext:_(s64) = G_ZEXT %trunc(s16)
    ; GCN-NEXT: $vgpr0_vgpr1 = COPY %zext(s64)
    %var:_(s32) = COPY $vgpr0
    %c3FFF:_(s32) = G_CONSTANT i32 16383
    %low_bits:_(s32) = G_AND %var, %c3FFF
    %trunc:_(s16) = G_TRUNC %low_bits(s32)
    %zext:_(s64) = G_ZEXT %trunc(s16)
    $vgpr0_vgpr1 = COPY %zext(s64)
...

---
name: zext_trunc_v2s32_v2s16_v2s32
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GCN-LABEL: name: zext_trunc_v2s32_v2s16_v2s32
    ; GCN: liveins: $vgpr0_vgpr1
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: %var:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; GCN-NEXT: %c3FFF:_(s32) = G_CONSTANT i32 16383
    ; GCN-NEXT: %c7FFF:_(s32) = G_CONSTANT i32 32767
    ; GCN-NEXT: %c:_(<2 x s32>) = G_BUILD_VECTOR %c3FFF(s32), %c7FFF(s32)
    ; GCN-NEXT: %low_bits:_(<2 x s32>) = G_AND %var, %c
    ; GCN-NEXT: $vgpr0_vgpr1 = COPY %low_bits(<2 x s32>)
    %var:_(<2 x s32>) = COPY $vgpr0_vgpr1
    %c3FFF:_(s32) = G_CONSTANT i32 16383
    %c7FFF:_(s32) = G_CONSTANT i32 32767
    %c:_(<2 x s32>) = G_BUILD_VECTOR %c3FFF(s32), %c7FFF(s32)
    %low_bits:_(<2 x s32>) = G_AND %var, %c
    %trunc:_(<2 x s16>) = G_TRUNC %low_bits(<2 x s32>)
    %zext:_(<2 x s32>) = G_ZEXT %trunc(<2 x s16>)
    $vgpr0_vgpr1 = COPY %zext(<2 x s32>)
...

---
name: zext_trunc_v2s32_v2s16_v2s32_unknown_high_bits
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GCN-LABEL: name: zext_trunc_v2s32_v2s16_v2s32_unknown_high_bits
    ; GCN: liveins: $vgpr0_vgpr1
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: %var:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; GCN-NEXT: %cFFFFF:_(s32) = G_CONSTANT i32 1048575
    ; GCN-NEXT: %c7FFF:_(s32) = G_CONSTANT i32 32767
    ; GCN-NEXT: %c:_(<2 x s32>) = G_BUILD_VECTOR %cFFFFF(s32), %c7FFF(s32)
    ; GCN-NEXT: %low_bits:_(<2 x s32>) = G_AND %var, %c
    ; GCN-NEXT: %trunc:_(<2 x s16>) = G_TRUNC %low_bits(<2 x s32>)
    ; GCN-NEXT: %zext:_(<2 x s32>) = G_ZEXT %trunc(<2 x s16>)
    ; GCN-NEXT: $vgpr0_vgpr1 = COPY %zext(<2 x s32>)
    %var:_(<2 x s32>) = COPY $vgpr0_vgpr1
    %cFFFFF:_(s32) = G_CONSTANT i32 1048575
    %c7FFF:_(s32) = G_CONSTANT i32 32767
    %c:_(<2 x s32>) = G_BUILD_VECTOR %cFFFFF(s32), %c7FFF(s32)
    %low_bits:_(<2 x s32>) = G_AND %var, %c
    %trunc:_(<2 x s16>) = G_TRUNC %low_bits(<2 x s32>)
    %zext:_(<2 x s32>) = G_ZEXT %trunc(<2 x s16>)
    $vgpr0_vgpr1 = COPY %zext(<2 x s32>)
...

---
name: zext_trunc_v2s64_v2s16_v2s32
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; GCN-LABEL: name: zext_trunc_v2s64_v2s16_v2s32
    ; GCN: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: %var:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; GCN-NEXT: %c3FFF:_(s64) = G_CONSTANT i64 16383
    ; GCN-NEXT: %c7FFF:_(s64) = G_CONSTANT i64 32767
    ; GCN-NEXT: %c:_(<2 x s64>) = G_BUILD_VECTOR %c3FFF(s64), %c7FFF(s64)
    ; GCN-NEXT: %low_bits:_(<2 x s64>) = G_AND %var, %c
    ; GCN-NEXT: %trunc:_(<2 x s16>) = G_TRUNC %low_bits(<2 x s64>)
    ; GCN-NEXT: %zext:_(<2 x s32>) = G_ZEXT %trunc(<2 x s16>)
    ; GCN-NEXT: $vgpr0_vgpr1 = COPY %zext(<2 x s32>)
    %var:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %c3FFF:_(s64) = G_CONSTANT i64 16383
    %c7FFF:_(s64) = G_CONSTANT i64 32767
    %c:_(<2 x s64>) = G_BUILD_VECTOR %c3FFF(s64), %c7FFF(s64)
    %low_bits:_(<2 x s64>) = G_AND %var, %c
    %trunc:_(<2 x s16>) = G_TRUNC %low_bits(<2 x s64>)
    %zext:_(<2 x s32>) = G_ZEXT %trunc(<2 x s16>)
    $vgpr0_vgpr1 = COPY %zext(<2 x s32>)
...

---
name: zext_trunc_v2s32_v2s16_v2s64
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GCN-LABEL: name: zext_trunc_v2s32_v2s16_v2s64
    ; GCN: liveins: $vgpr0_vgpr1
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: %var:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; GCN-NEXT: %c3FFF:_(s32) = G_CONSTANT i32 16383
    ; GCN-NEXT: %c7FFF:_(s32) = G_CONSTANT i32 32767
    ; GCN-NEXT: %c:_(<2 x s32>) = G_BUILD_VECTOR %c3FFF(s32), %c7FFF(s32)
    ; GCN-NEXT: %low_bits:_(<2 x s32>) = G_AND %var, %c
    ; GCN-NEXT: %trunc:_(<2 x s16>) = G_TRUNC %low_bits(<2 x s32>)
    ; GCN-NEXT: %zext:_(<2 x s64>) = G_ZEXT %trunc(<2 x s16>)
    ; GCN-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %zext(<2 x s64>)
    %var:_(<2 x s32>) = COPY $vgpr0_vgpr1
    %c3FFF:_(s32) = G_CONSTANT i32 16383
    %c7FFF:_(s32) = G_CONSTANT i32 32767
    %c:_(<2 x s32>) = G_BUILD_VECTOR %c3FFF(s32), %c7FFF(s32)
    %low_bits:_(<2 x s32>) = G_AND %var, %c
    %trunc:_(<2 x s16>) = G_TRUNC %low_bits(<2 x s32>)
    %zext:_(<2 x s64>) = G_ZEXT %trunc(<2 x s16>)
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %zext(<2 x s64>)
...
llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-zext-trunc.mir
