llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=GCN

---
name:            test_sendmsg
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body:             |
  bb.0:
    liveins: $sgpr0

    ; GCN-LABEL: name: test_sendmsg
    ; GCN: liveins: $sgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GCN-NEXT: $m0 = COPY [[COPY]]
    ; GCN-NEXT: S_SENDMSG 1, implicit $exec, implicit $m0
    ; GCN-NEXT: S_ENDPGM 0
    %0:sgpr(s32) = COPY $sgpr0
    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.sendmsg), 1, %0(s32)
    S_ENDPGM 0

...