llvm/llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s

--- |
  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

  define void @inttoptr_p0_s64() { ret void }
  define void @ptrtoint_s64_p0() { ret void }
  define void @ptrtoint_s32_p0() { ret void }
  define void @ptrtoint_s16_p0() { ret void }
  define void @ptrtoint_s8_p0() { ret void }
  define void @ptrtoint_s1_p0() { ret void }
  define void @inttoptr_v2p0_v2s64() { ret void }
  define void @ptrtoint_v2s64_v2p0() { ret void }
...

---
name:            inttoptr_p0_s64
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: inttoptr_p0_s64
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64all = COPY $x0
    ; CHECK-NEXT: $x0 = COPY [[COPY]]
    %0(s64) = COPY $x0
    %1(p0) = G_INTTOPTR %0
    $x0 = COPY %1(p0)
...

---
name:            ptrtoint_s64_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: ptrtoint_s64_p0
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: $x0 = COPY [[COPY]]
    %0(p0) = COPY $x0
    %1(s64) = G_PTRTOINT %0
    $x0 = COPY %1(s64)
...

---
name:            ptrtoint_s32_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: ptrtoint_s32_p0
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %ptr:gpr64 = COPY $x0
    ; CHECK-NEXT: %ptr2int:gpr64common = COPY %ptr
    ; CHECK-NEXT: %int:gpr32sp = COPY %ptr2int.sub_32
    ; CHECK-NEXT: $w0 = COPY %int
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %ptr:gpr(p0) = COPY $x0
    %ptr2int:gpr(s64) = G_PTRTOINT %ptr(p0)
    %int:gpr(s32) = G_TRUNC %ptr2int(s64)
    $w0 = COPY %int(s32)
    RET_ReallyLR implicit $w0
...

---
name:            ptrtoint_s16_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: ptrtoint_s16_p0
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %ptr:gpr64 = COPY $x0
    ; CHECK-NEXT: %int:gpr32 = COPY %ptr.sub_32
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY %int
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY [[COPY]].hsub
    ; CHECK-NEXT: $h0 = COPY [[COPY1]]
    ; CHECK-NEXT: RET_ReallyLR implicit $h0
    %ptr:gpr(p0) = COPY $x0
    %ptr2int:gpr(s64) = G_PTRTOINT %ptr(p0)
    %int:gpr(s16) = G_TRUNC %ptr2int(s64)
    $h0 = COPY %int(s16)
    RET_ReallyLR implicit $h0
...

---
name:            ptrtoint_s8_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: ptrtoint_s8_p0
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %ptr:gpr64 = COPY $x0
    ; CHECK-NEXT: %int:gpr32 = COPY %ptr.sub_32
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY %int
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr8 = COPY [[COPY]].bsub
    ; CHECK-NEXT: $b0 = COPY [[COPY1]]
    ; CHECK-NEXT: RET_ReallyLR implicit $b0
    %ptr:gpr(p0) = COPY $x0
    %ptr2int:gpr(s64) = G_PTRTOINT %ptr(p0)
    %int:gpr(s8) = G_TRUNC %ptr2int(s64)
    $b0 = COPY %int(s8)
    RET_ReallyLR implicit $b0

...
---
name:            ptrtoint_s1_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: ptrtoint_s1_p0
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %ptr:gpr64 = COPY $x0
    ; CHECK-NEXT: %ptr2int:gpr64common = COPY %ptr
    ; CHECK-NEXT: %trunc:gpr32common = COPY %ptr2int.sub_32
    ; CHECK-NEXT: %ext:gpr32sp = ANDWri %trunc, 0
    ; CHECK-NEXT: $w0 = COPY %ext
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %ptr:gpr(p0) = COPY $x0
    %ptr2int:gpr(s64) = G_PTRTOINT %ptr(p0)
    %one:gpr(s32) = G_CONSTANT i32 1
    %trunc:gpr(s32) = G_TRUNC %ptr2int(s64)
    %ext:gpr(s32) = G_AND %trunc, %one
    $w0 = COPY %ext(s32)
    RET_ReallyLR implicit $w0
...
---
name:            inttoptr_v2p0_v2s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $x0
    ; CHECK-LABEL: name: inttoptr_v2p0_v2s64
    ; CHECK: liveins: $q0, $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY [[COPY]].dsub
    ; CHECK-NEXT: $x0 = COPY [[COPY1]]
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %1:fpr(<2 x s64>) = COPY $q0
    %2:fpr(<2 x p0>) = G_INTTOPTR %1(<2 x s64>)
    %4:gpr(s64) = G_CONSTANT i64 0
    %3:fpr(p0) = G_EXTRACT_VECTOR_ELT %2(<2 x p0>), %4(s64)
    $x0 = COPY %3(p0)
    RET_ReallyLR implicit $x0
...
...
---
name:            ptrtoint_v2s64_v2p0
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: ptrtoint_v2s64_v2p0
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %ptr:fpr128 = COPY $q0
    ; CHECK-NEXT: $q0 = COPY %ptr
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %ptr:fpr(<2 x p0>) = COPY $q0
    %int:fpr(<2 x s64>) = G_PTRTOINT %ptr(<2 x p0>)
    $q0 = COPY %int(<2 x s64>)
    RET_ReallyLR implicit $q0
...