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llvm/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir 

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s

name:            right_ident_sub
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x - 0) -> x
    ;
    ; CHECK-LABEL: name: right_ident_sub
    ; CHECK: liveins: $w0
    ; CHECK: %x:_(s32) = COPY $w0
    ; CHECK: $w0 = COPY %x(s32)
    ; CHECK: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_SUB %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            right_ident_add
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x + 0) -> x
    ;
    ; CHECK-LABEL: name: right_ident_add
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: $w0 = COPY %x(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_ADD %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            mul_0
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x * 0) -> 0
    ;
    ; CHECK-LABEL: name: mul_0
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: $w0 = COPY %cst(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_MUL %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...

---
name:            mul_0_cant_replace
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x * 0) -> 0
    ;
    ; CHECK-LABEL: name: mul_0_cant_replace
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: %op:gpr(s32) = G_MUL %x, %cst
    ; CHECK-NEXT: $w0 = COPY %op(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:gpr(s32) = G_MUL %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...

---
name:            sdiv_0
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (0 / x) -> 0
    ;
    ; CHECK-LABEL: name: sdiv_0
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: $w0 = COPY %cst(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_SDIV %cst, %x
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            udiv_0
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (0 / x) -> 0
    ;
    ; CHECK-LABEL: name: udiv_0
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: $w0 = COPY %cst(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_UDIV %cst, %x
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            srem_0
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (0 % x) -> 0
    ;
    ; CHECK-LABEL: name: srem_0
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: $w0 = COPY %cst(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_SREM %cst, %x
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            urem_0
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (0 % x) -> 0
    ;
    ; CHECK-LABEL: name: urem_0
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: $w0 = COPY %cst(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_UREM %cst, %x
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...

---
name:            right_ident_or
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x || 0) -> x
    ;
    ; CHECK-LABEL: name: right_ident_or
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: $w0 = COPY %x(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_OR %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            right_ident_xor
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x | 0) -> x
    ;
    ; CHECK-LABEL: name: right_ident_xor
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: $w0 = COPY %x(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_XOR %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            right_ident_shl
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x << 0) -> x
    ;
    ; CHECK-LABEL: name: right_ident_shl
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: $w0 = COPY %x(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_SHL %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            right_ident_ashr
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x ashr 0) -> x
    ;
    ; CHECK-LABEL: name: right_ident_ashr
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: $w0 = COPY %x(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_ASHR %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            right_ident_lshr
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Fold (x lshr 0) -> x
    ;
    ; CHECK-LABEL: name: right_ident_lshr
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: $w0 = COPY %x(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 0
    %op:_(s32) = G_LSHR %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            dont_fold_sub
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $w0
    ; Not an identity, no folding.
    ;
    ; CHECK-LABEL: name: dont_fold_sub
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(s32) = COPY $w0
    ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %op:_(s32) = G_SUB %x, %cst
    ; CHECK-NEXT: $w0 = COPY %op(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %x:_(s32) = COPY $w0
    %cst:_(s32) = G_CONSTANT i32 1
    %op:_(s32) = G_SUB %x(s32), %cst
    $w0 = COPY %op(s32)
    RET_ReallyLR implicit $w0

...
---
name:            look_through_zext
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: look_through_zext
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %zext_zero:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: $x0 = COPY %zext_zero(s64)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %zero:_(s8) = G_CONSTANT i8 0
    %zext_zero:_(s64) = G_ZEXT %zero(s8)
    %c:_(s64) = G_CONSTANT i64 72340172838076673
    %mul:_(s64) = G_MUL %c, %zext_zero
    $x0 = COPY %mul(s64)
    RET_ReallyLR implicit $x0
...
---
name:            right_ident_ptr_add
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $x0
    ; Fold (x + 0) -> x
    ;
    ; CHECK-LABEL: name: right_ident_ptr_add
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %x:_(p0) = COPY $x0
    ; CHECK-NEXT: $x0 = COPY %x(p0)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %x:_(p0) = COPY $x0
    %cst:_(s64) = G_CONSTANT i64 0
    %op:_(p0) = G_PTR_ADD %x(p0), %cst
    $x0 = COPY %op(p0)
    RET_ReallyLR implicit $x0
...
---
name:            right_identity_rotl
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0, $w1
    ; CHECK-LABEL: name: right_identity_rotl
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:_(s32) = COPY $w0
    ; CHECK-NEXT: $w0 = COPY %copy(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %copy:_(s32) = COPY $w0
    %zero:_(s32) = G_CONSTANT i32 0
    %rot:_(s32) = G_ROTL %copy(s32), %zero(s32)
    $w0 = COPY %rot(s32)
    RET_ReallyLR implicit $w0
...
...
---
name:            right_identity_rotr
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0, $w1
    ; CHECK-LABEL: name: right_identity_rotr
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:_(s32) = COPY $w0
    ; CHECK-NEXT: $w0 = COPY %copy(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %copy:_(s32) = COPY $w0
    %zero:_(s32) = G_CONSTANT i32 0
    %rot:_(s32) = G_ROTR %copy(s32), %zero(s32)
    $w0 = COPY %rot(s32)
    RET_ReallyLR implicit $w0
...
---
name: lshr_of_vec_zero
body:             |
  bb.1:
  liveins: $q0
    ; CHECK-LABEL: name: lshr_of_vec_zero
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
    ; CHECK-NEXT: $q0 = COPY [[COPY]](<8 x s16>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %0:_(<8 x s16>) = COPY $q0
    %5:_(s16) = G_CONSTANT i16 0
    %zero_vec:_(<8 x s16>) = G_BUILD_VECTOR %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16)
    %shift:_(<8 x s16>) = G_LSHR %0, %zero_vec(<8 x s16>)
    $q0 = COPY %shift(<8 x s16>)
    RET_ReallyLR implicit $q0
...
---
name: ptradd_of_vec_zero
body:             |
  bb.1:
  liveins: $q0
    ; CHECK-LABEL: name: ptradd_of_vec_zero
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $q0
    ; CHECK-NEXT: $q0 = COPY [[COPY]](<2 x p0>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %0:_(<2 x p0>) = COPY $q0
    %5:_(s64) = G_CONSTANT i64 0
    %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %5(s64), %5(s64)
    %ptr:_(<2 x p0>) = G_PTR_ADD %0, %zero_vec(<2 x s64>)
    $q0 = COPY %ptr(<2 x p0>)
    RET_ReallyLR implicit $q0
...
---
name:            i128_or_cst
liveins:
  - { reg: '$x0' }
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: i128_or_cst
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p0) :: (load (s128))
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 9223372036854775808
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s128) = G_OR [[LOAD]], [[C]]
    ; CHECK-NEXT: G_STORE [[OR]](s128), [[COPY]](p0) :: (store (s128), align 4)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(p0) = COPY $x0
    %2:_(s128) = G_LOAD %0(p0) :: (load (s128))
    %4:_(s128) = G_CONSTANT i128 9223372036854775808
    %5:_(s128) = G_OR %2, %4
    G_STORE %5(s128), %0(p0) :: (store (s128), align 4)
    RET_ReallyLR

...
---
name:            mul_1_shift_of_shift
liveins:
  - { reg: '$x0' }
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: mul_1_shift_of_shift
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[C]]
    ; CHECK-NEXT: $x0 = COPY [[OR]](s64)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(s64) = COPY $x0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s64) = G_SHL %0, %1(s64)
    %3:_(s64) = G_OR %2, %1
    %4:_(s64) = G_MUL %3, %1
    $x0 = COPY %4(s64)
    RET_ReallyLR implicit $x0

...
---
name:            udiv_of_sext
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$w0' }
body:             |
  bb.1:
    liveins: $w0

    ; CHECK-LABEL: name: udiv_of_sext
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: $w0 = COPY [[C]](s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %2:_(s1) = G_CONSTANT i1 true
    %4:_(s2) = G_CONSTANT i2 1
    %3:_(s2) = G_SEXT %2:_(s1)
    %5:_(s2) = G_UDIV %4:_, %3:_
    %6:_(s32) = G_ANYEXT %5:_(s2)
    $w0 = COPY %6:_(s32)
    RET_ReallyLR implicit $w0

...