llvm/llvm/test/CodeGen/AArch64/GlobalISel/legalize-build-vector.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-linux-gnu -O0 -run-pass=legalizer %s -o - | FileCheck %s

---
name:            legal_v4s32
body: |
  bb.0:
    liveins: $w0, $w1, $w2, $w3
    ; CHECK-LABEL: name: legal_v4s32
    ; CHECK: liveins: $w0, $w1, $w2, $w3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $w3
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32)
    ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<4 x s32>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(s32) = COPY $w0
    %1:_(s32) = COPY $w1
    %2:_(s32) = COPY $w2
    %3:_(s32) = COPY $w3
    %4:_(<4 x s32>) = G_BUILD_VECTOR %0(s32), %1(s32), %2(s32), %3(s32)
    $q0 = COPY %4(<4 x s32>)
    RET_ReallyLR
...
---
name:            legal_v2s64
body: |
  bb.0:
    liveins: $x0, $x1
    ; CHECK-LABEL: name: legal_v2s64
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64)
    ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<2 x s64>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(s64) = COPY $x0
    %1:_(s64) = COPY $x1
    %2:_(<2 x s64>) = G_BUILD_VECTOR %0(s64), %1(s64)
    $q0 = COPY %2(<2 x s64>)
    RET_ReallyLR
...
---
name:            legal_v2p0
body: |
  bb.0:
    liveins: $x0, $x1
    ; CHECK-LABEL: name: legal_v2p0
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[COPY]](p0), [[COPY1]](p0)
    ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<2 x p0>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(p0) = COPY $x0
    %1:_(p0) = COPY $x1
    %2:_(<2 x p0>) = G_BUILD_VECTOR %0(p0), %1(p0)
    $q0 = COPY %2(<2 x p0>)
    RET_ReallyLR
...
---
name:            legal_v16s8
body: |
  bb.0:
    ; CHECK-LABEL: name: legal_v16s8
    ; CHECK: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8)
    ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<16 x s8>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(s8) = G_IMPLICIT_DEF
    %1:_(s8) = G_IMPLICIT_DEF
    %2:_(<16 x s8>) = G_BUILD_VECTOR %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8)
    $q0 = COPY %2(<16 x s8>)
    RET_ReallyLR
...
---
name:            legal_v8s8
body: |
  bb.0:
    ; CHECK-LABEL: name: legal_v8s8
    ; CHECK: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8)
    ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<8 x s8>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(s8) = G_IMPLICIT_DEF
    %1:_(s8) = G_IMPLICIT_DEF
    %2:_(<8 x s8>) = G_BUILD_VECTOR %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8), %0(s8), %1(s8)
    $d0 = COPY %2(<8 x s8>)
    RET_ReallyLR
...
---
name:            widen_v16s1
body: |
  bb.0:
    ; CHECK-LABEL: name: widen_v16s1
    ; CHECK: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8), [[DEF]](s8), [[DEF1]](s8)
    ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<16 x s8>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(s1) = G_IMPLICIT_DEF
    %1:_(s1) = G_IMPLICIT_DEF
    %2:_(<16 x s1>) = G_BUILD_VECTOR %0(s1), %1(s1), %0(s1), %1(s1), %0(s1), %1(s1), %0(s1), %1(s1), %0(s1), %1(s1), %0(s1), %1(s1), %0(s1), %1(s1), %0(s1), %1(s1)
    %w:_(<16 x s8>) = G_ANYEXT %2
    $q0 = COPY %w(<16 x s8>)
    RET_ReallyLR
...
---
name:            widen_v2s16
body: |
  bb.0:
    liveins: $x0, $x1
    ; CHECK-LABEL: name: widen_v2s16
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $h1
    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[COPY]](s16), [[COPY1]](s16), [[DEF]](s16), [[DEF]](s16)
    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<4 x s32>) = G_ANYEXT [[BUILD_VECTOR]](<4 x s16>)
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s32>), [[UV1:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[ANYEXT]](<4 x s32>)
    ; CHECK-NEXT: $d0 = COPY [[UV]](<2 x s32>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(s16) = COPY $h0
    %1:_(s16) = COPY $h1
    %2:_(<2 x s16>) = G_BUILD_VECTOR %0(s16), %1(s16)
    %3:_(<2 x s32>) = G_ANYEXT %2(<2 x s16>)
    $d0 = COPY %3(<2 x s32>)
    RET_ReallyLR
...

---
name:            widen_v2s8
body: |
  bb.0:
    ; CHECK-LABEL: name: widen_v2s8
    ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[DEF]](s32)
    ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<2 x s32>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(s8) = G_IMPLICIT_DEF
    %1:_(s8) = G_IMPLICIT_DEF
    %2:_(<2 x s8>) = G_BUILD_VECTOR %0(s8), %1(s8)
    %3:_(<2 x s32>) = G_ANYEXT %2(<2 x s8>)
    $d0 = COPY %3(<2 x s32>)
    RET_ReallyLR
...

---
name:            widen_v4s8
body: |
  bb.0:
    ; CHECK-LABEL: name: widen_v4s8
    ; CHECK: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF3:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR [[DEF]](s8), [[DEF1]](s8), [[DEF2]](s8), [[DEF3]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)
    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<8 x s16>) = G_ANYEXT [[BUILD_VECTOR]](<8 x s8>)
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<4 x s16>), [[UV1:%[0-9]+]]:_(<4 x s16>) = G_UNMERGE_VALUES [[ANYEXT]](<8 x s16>)
    ; CHECK-NEXT: $d0 = COPY [[UV]](<4 x s16>)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(s8) = G_IMPLICIT_DEF
    %1:_(s8) = G_IMPLICIT_DEF
    %2:_(s8) = G_IMPLICIT_DEF
    %3:_(s8) = G_IMPLICIT_DEF
    %4:_(<4 x s8>) = G_BUILD_VECTOR %0(s8), %1(s8), %2(s8), %3(s8)
    %5:_(<4 x s16>) = G_ANYEXT %4(<4 x s8>)
    $d0 = COPY %5(<4 x s16>)
    RET_ReallyLR
...