combine-ptradd-reassociation.mir | Explore in Territory

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown --aarch64prelegalizercombiner-only-enable-rule="reassoc_ptradd" %s -o - | FileCheck %s
# REQUIRES: asserts

---
name:            test1_noreassoc_legal_already_new_is_illegal
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$x0' }
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: test1_noreassoc_legal_already_new_is_illegal
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1600
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 6
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32))
    ; CHECK-NEXT: G_STORE [[C2]](s32), [[PTR_ADD]](p0) :: (store (s32))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_CONSTANT i64 1600
    %4:_(s64) = G_CONSTANT i64 6
    %9:_(s32) = G_CONSTANT i32 0
    %10:_(p0) = G_PTR_ADD %0, %2(s64)
    %11:_(p0) = G_PTR_ADD %10, %4(s64)
    %7:_(s32) = G_LOAD %11(p0) :: (load 4)
    G_STORE %9(s32), %10(p0) :: (store 4) ; other use of %10
    $w0 = COPY %7(s32)
    RET_ReallyLR implicit $w0

...
---
name:            test2_reassoc_already_legal_new_also_legal
alignment:       4
liveins:
  - { reg: '$x0' }
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: test2_reassoc_already_legal_new_also_legal
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32))
    ; CHECK-NEXT: G_STORE [[C1]](s32), [[PTR_ADD]](p0) :: (store (s32))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_CONSTANT i64 10
    %4:_(s64) = G_CONSTANT i64 6
    %9:_(s32) = G_CONSTANT i32 0
    %10:_(p0) = G_PTR_ADD %0, %2(s64)
    %11:_(p0) = G_PTR_ADD %10, %4(s64)
    %7:_(s32) = G_LOAD %11(p0) :: (load 4)
    G_STORE %9(s32), %10(p0) :: (store 4) ; other use of %10
    $w0 = COPY %7(s32)
    RET_ReallyLR implicit $w0

...
---
name:            test3_noreassoc_only_oneuse
alignment:       4
liveins:
  - { reg: '$x0' }
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: test3_noreassoc_only_oneuse
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4783
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:_(p0) = COPY $x0
    %10:_(s64) = G_CONSTANT i64 4783
    %9:_(p0) = G_PTR_ADD %0, %10(s64)
    %7:_(s32) = G_LOAD %9(p0) :: (load 4)
    $w0 = COPY %7(s32)
    RET_ReallyLR implicit $w0

...
---
name:            test4_reassoc_existing_is_already_illegal
alignment:       4
liveins:
  - { reg: '$x0' }
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: test4_reassoc_existing_is_already_illegal
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 17
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 4096
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32))
    ; CHECK-NEXT: G_STORE [[C1]](s32), [[PTR_ADD]](p0) :: (store (s32))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_CONSTANT i64 17
    %4:_(s64) = G_CONSTANT i64 4079
    %9:_(s32) = G_CONSTANT i32 0
    %10:_(p0) = G_PTR_ADD %0, %2(s64)
    %11:_(p0) = G_PTR_ADD %10, %4(s64)
    %7:_(s32) = G_LOAD %11(p0) :: (load 4)
    G_STORE %9(s32), %10(p0) :: (store 4) ; other use of %10
    $w0 = COPY %7(s32)
    RET_ReallyLR implicit $w0

...
---
name:            test5_add_on_rhs
alignment:       4
liveins:
  - { reg: '$x0' }
  - { reg: '$x1' }
body:             |
  bb.1:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: test5_add_on_rhs
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[COPY1]](s64)
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C]](s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s8))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:_(p0) = COPY $x0
    %1:_(s64) = COPY $x1
    %2:_(s64) = G_CONSTANT i64 1
    %3:_(s64) = G_ADD %1, %2
    %4:_(p0) = G_PTR_ADD %0, %3(s64)
    %7:_(s32) = G_LOAD %4(p0) :: (load 1)
    $w0 = COPY %7(s32)
    RET_ReallyLR implicit $w0

...
---
name:            walk_through_inttoptr
alignment:       4
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $x0
    ; CHECK-LABEL: name: walk_through_inttoptr
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1600
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1606
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64)
    ; CHECK-NEXT: %ptr_to_int:_(s64) = G_PTRTOINT [[PTR_ADD1]](p0)
    ; CHECK-NEXT: %int_to_ptr:_(p0) = G_INTTOPTR %ptr_to_int(s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %int_to_ptr(p0) :: (load (s32))
    ; CHECK-NEXT: G_STORE [[C1]](s32), [[PTR_ADD]](p0) :: (store (s32))
    ; CHECK-NEXT: G_STORE %ptr_to_int(s64), [[PTR_ADD]](p0) :: (store (s64))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:_(p0) = COPY $x0
    %2:_(s64) = G_CONSTANT i64 1600
    %4:_(s64) = G_CONSTANT i64 6
    %9:_(s32) = G_CONSTANT i32 0
    %10:_(p0) = G_PTR_ADD %0, %2(s64)
    %11:_(p0) = G_PTR_ADD %10, %4(s64)
    %ptr_to_int:_(s64) = G_PTRTOINT %11
    %int_to_ptr:_(p0) = G_INTTOPTR %ptr_to_int
    %7:_(s32) = G_LOAD %int_to_ptr(p0) :: (load 4)
    G_STORE %9(s32), %10(p0) :: (store 4) ; other use of %10
    G_STORE %ptr_to_int(s64), %10(p0) :: (store 8)
    $w0 = COPY %7(s32)
    RET_ReallyLR implicit $w0
...
---
name:            reassoc_cst_inner_lhs
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$w0' }
  - { reg: '$x1' }
  - { reg: '$x2' }
  - { reg: '$x3' }
body:             |
  bb.1:
    liveins: $w0, $x1, $x2, $x3

    ; CHECK-LABEL: name: reassoc_cst_inner_lhs
    ; CHECK: liveins: $w0, $x1, $x2, $x3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x3
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 40
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
    ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[SHL]](s64)
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C]](s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: RET_ReallyLR
    %1:_(p0) = COPY $x1
    %2:_(p0) = COPY $x2
    %3:_(s64) = COPY $x3
    %8:_(s64) = G_CONSTANT i64 40
    %9:_(p0) = G_PTR_ADD %2, %8(s64)
    %10:_(s64) = G_CONSTANT i64 2
    %11:_(s64) = G_SHL %3, %10
    %12:_(p0) = G_PTR_ADD %9, %11(s64)
    %14:_(s32) = G_LOAD %12(p0) :: (load (s32))
    $w0 = COPY %14
    RET_ReallyLR

...
---
name:            reassoc_cst_inner_lhs_multiuse
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$w0' }
  - { reg: '$x1' }
  - { reg: '$x2' }
  - { reg: '$x3' }
body:             |
  bb.1:
    liveins: $w0, $x1, $x2, $x3

    ; CHECK-LABEL: name: reassoc_cst_inner_lhs_multiuse
    ; CHECK: liveins: $w0, $x1, $x2, $x3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x3
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 40
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
    ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[SHL]](s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: $x0 = COPY [[PTR_ADD]](p0)
    ; CHECK-NEXT: RET_ReallyLR
    %1:_(p0) = COPY $x1
    %2:_(p0) = COPY $x2
    %3:_(s64) = COPY $x3
    %8:_(s64) = G_CONSTANT i64 40
    %9:_(p0) = G_PTR_ADD %2, %8(s64)
    %10:_(s64) = G_CONSTANT i64 2
    %11:_(s64) = G_SHL %3, %10
    %12:_(p0) = G_PTR_ADD %9, %11(s64)
    %14:_(s32) = G_LOAD %12(p0) :: (load (s32))
    $w0 = COPY %14
    $x0 = COPY %9
    RET_ReallyLR

...
---
name:            reassoc_cst_inner_lhs_const_lhs
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$w0' }
  - { reg: '$x1' }
  - { reg: '$x2' }
  - { reg: '$x3' }
body:             |
  bb.1:
    liveins: $w0, $x1, $x2, $x3

    ; CHECK-LABEL: name: reassoc_cst_inner_lhs_const_lhs
    ; CHECK: liveins: $w0, $x1, $x2, $x3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x3
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 40
    ; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[C]](s64)
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[INTTOPTR]], [[COPY]](s64)
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
    ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[SHL]](s64)
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32))
    ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
    ; CHECK-NEXT: RET_ReallyLR
    %1:_(p0) = COPY $x1
    %2:_(s64) = COPY $x2
    %3:_(s64) = COPY $x3
    %8:_(s64) = G_CONSTANT i64 40
    %9:_(p0) = G_INTTOPTR %8(s64)
    %10:_(p0) = G_PTR_ADD %9, %2(s64)
    %11:_(s64) = G_CONSTANT i64 2
    %12:_(s64) = G_SHL %3, %11
    %13:_(p0) = G_PTR_ADD %10, %12(s64)
    %15:_(s32) = G_LOAD %13(p0) :: (load (s32))
    $w0 = COPY %15
    RET_ReallyLR

...
llvm/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-reassociation.mir
