llvm/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-mulpow2.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s

...
---
name:            dont_combine_ptr_add
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x0, $x1, $x2

    ; G_PTR_ADD can become a madd, so we don't want to perform the combine.

    ; CHECK-LABEL: name: dont_combine_ptr_add
    ; CHECK: liveins: $x0, $x1, $x2
    ; CHECK: %reg0:_(s64) = COPY $x0
    ; CHECK: %ptr:_(p0) = COPY $x2
    ; CHECK: %cst:_(s64) = G_CONSTANT i64 6
    ; CHECK: %mul:_(s64) = nsw G_MUL %reg0, %cst
    ; CHECK: %ptr_add:_(p0) = G_PTR_ADD %ptr, %mul(s64)
    ; CHECK: $x0 = COPY %ptr_add(p0)
    ; CHECK: RET_ReallyLR implicit $x0
    %reg0:_(s64) = COPY $x0
    %reg1:_(s64) = COPY $x1
    %ptr:_(p0) = COPY $x2
    %cst:_(s64) = G_CONSTANT i64 6
    %mul:_(s64) = nsw G_MUL %reg0, %cst
    %ptr_add:_(p0) = G_PTR_ADD %ptr, %mul
    $x0 = COPY %ptr_add(p0)
    RET_ReallyLR implicit $x0