llvm/llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector-of-ptr.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -O0 -debugify-and-strip-all-safe -mtriple=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
--- |
  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
  target triple = "aarch64"

  define void @store_v2p0(<2 x ptr> %v, ptr %ptr) {
    store <2 x ptr> %v, ptr %ptr
    ret void
  }

  define <2 x ptr> @load_v2p0(ptr %ptr) {
    %v = load <2 x ptr>, ptr %ptr
    ret <2 x ptr> %v
  }

  define void @load_v2p1(ptr %ptr) { ret void }

...
---
name:            store_v2p0
alignment:       4
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.1 (%ir-block.0):
    liveins: $q0, $x0

    ; CHECK-LABEL: name: store_v2p0
    ; CHECK: liveins: $q0, $x0
    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $q0
    ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s64>) = G_BITCAST [[COPY]](<2 x p0>)
    ; CHECK: G_STORE [[BITCAST]](<2 x s64>), [[COPY1]](p0) :: (store (<2 x s64>) into %ir.ptr)
    ; CHECK: RET_ReallyLR
    %0:_(<2 x p0>) = COPY $q0
    %1:_(p0) = COPY $x0
    G_STORE %0(<2 x p0>), %1(p0) :: (store (<2 x p0>) into %ir.ptr)
    RET_ReallyLR

...
---
name:            load_v2p0
alignment:       4
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.1 (%ir-block.0):
    liveins: $x0

    ; CHECK-LABEL: name: load_v2p0
    ; CHECK: liveins: $x0
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load (<2 x s64>) from %ir.ptr)
    ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x p0>) = G_BITCAST [[LOAD]](<2 x s64>)
    ; CHECK: $q0 = COPY [[BITCAST]](<2 x p0>)
    ; CHECK: RET_ReallyLR implicit $q0
    %0:_(p0) = COPY $x0
    %1:_(<2 x p0>) = G_LOAD %0(p0) :: (load (<2 x p0>) from %ir.ptr)
    $q0 = COPY %1(<2 x p0>)
    RET_ReallyLR implicit $q0

...
---
name:            load_v2p1
alignment:       4
tracksRegLiveness: true
machineFunctionInfo: {}
body:             |
  bb.1 (%ir-block.0):
    liveins: $x0

    ; Check that we don't try to bitcast vectors of pointers w/ non-zero addrspaces.

    ; CHECK-LABEL: name: load_v2p1
    ; CHECK: liveins: $x0
    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x p1>) = G_LOAD [[COPY]](p0) :: (load (<2 x p1>) from %ir.ptr)
    ; CHECK: $q0 = COPY [[LOAD]](<2 x p1>)
    ; CHECK: RET_ReallyLR implicit $q0
    %0:_(p0) = COPY $x0
    %1:_(<2 x p1>) = G_LOAD %0(p0) :: (load (<2 x p1>) from %ir.ptr)
    $q0 = COPY %1(<2 x p1>)
    RET_ReallyLR implicit $q0

...