llvm/llvm/test/CodeGen/AArch64/branch-relax-cbz.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-cbz-offset-bits=3 < %s | FileCheck %s


define void @split_block_no_fallthrough(i64 %val) #0 {
; CHECK-LABEL: split_block_no_fallthrough:
; CHECK:       ; %bb.0: ; %bb
; CHECK-NEXT:    cmn x0, #5
; CHECK-NEXT:    b.le LBB0_3
; CHECK-NEXT:  ; %bb.1: ; %b3
; CHECK-NEXT:    ldr w8, [x8]
; CHECK-NEXT:    cbnz w8, LBB0_2
; CHECK-NEXT:    b LBB0_4
; CHECK-NEXT:  LBB0_2: ; %common.ret
; CHECK-NEXT:    ret
; CHECK-NEXT:  LBB0_3: ; %b2
; CHECK-NEXT:    stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
; CHECK-NEXT:    mov w0, #93 ; =0x5d
; CHECK-NEXT:    bl _extfunc
; CHECK-NEXT:    ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
; CHECK-NEXT:    cbz w0, LBB0_4
; CHECK-NEXT:    b LBB0_2
; CHECK-NEXT:  LBB0_4: ; %b7
; CHECK-NEXT:    mov w0, #13 ; =0xd
; CHECK-NEXT:    b _extfunc
bb:
  %c0 = icmp sgt i64 %val, -5
  br i1 %c0, label %b3, label %b2

b2:
  %v0 = tail call i32 @extfunc(i32 93)
  %c1 = icmp eq i32 %v0, 0
  br i1 %c1, label %b7, label %b8

b3:
  %v1 = load volatile i32, ptr undef, align 4
  %c2 = icmp eq i32 %v1, 0
  br i1 %c2, label %b7, label %b8

b7:
  %tmp1 = tail call i32 @extfunc(i32 13)
  ret void

b8:
  ret void
}

declare i32 @extfunc(i32) #0

attributes #0 = { nounwind }