llvm/llvm/test/CodeGen/AArch64/pr61111.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s

define i62 @f(i1 %0) {
; CHECK-LABEL: f:
; CHECK:       // %bb.0:
; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
; CHECK-NEXT:    and x8, x0, #0x1
; CHECK-NEXT:    sub x8, x8, #1
; CHECK-NEXT:    tst x8, #0x3fffffffffffffff
; CHECK-NEXT:    cset w0, ne
; CHECK-NEXT:    ret
  %2 = zext i1 %0 to i59
  %3 = call { i59, i1 } @llvm.umul.with.overflow.i59(i59 %2, i59 -1)
  %4 = extractvalue { i59, i1 } %3, 0
  %5 = trunc i59 %4 to i21
  %6 = trunc i59 %4 to i21
  %7 = ashr i21 %5, %6
  %8 = sext i21 %7 to i62
  %9 = icmp ugt i62 -1, %8
  %10 = zext i1 %9 to i62
  ret i62 %10
}

declare { i59, i1 } @llvm.umul.with.overflow.i59(i59, i59)