# RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu \
# RUN: -start-before aarch64-sls-hardening \
# RUN: -stop-after aarch64-sls-hardening -o - %s \
# RUN: | FileCheck %s --check-prefixes=CHECK \
# RUN: --implicit-check-not=__llvm_slsblr_thunk_x7
# RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu \
# RUN: -start-before aarch64-sls-hardening \
# RUN: -asm-verbose=0 -o - %s \
# RUN: | FileCheck %s --check-prefixes=ASM \
# RUN: --implicit-check-not=__llvm_slsblr_thunk_x7
# Check that the BLR SLS hardening transforms a BLR into a BL with operands as
# expected.
--- |
@a = dso_local local_unnamed_addr global i32 (...)* null, align 8
@b = dso_local local_unnamed_addr global i32 0, align 4
define dso_local void @fn1() local_unnamed_addr "target-features"="+harden-sls-blr" {
entry:
%0 = load i32 ()*, i32 ()** bitcast (i32 (...)** @a to i32 ()**), align 8
%call = tail call i32 %0() nounwind
store i32 %call, i32* @b, align 4
ret void
}
...
---
name: fn1
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: fn1
bb.0.entry:
liveins: $lr
early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 ; :: (store (s64) into %stack.0)
frame-setup CFI_INSTRUCTION def_cfa_offset 16
frame-setup CFI_INSTRUCTION offset $w30, -16
renamable $x8 = ADRP target-flags(aarch64-page) @a
renamable $x8 = LDRXui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @a :: (dereferenceable load (s64) from `i32 ()** bitcast (i32 (...)** @a to i32 ()**)`)
BLRNoIP killed renamable $x8, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $w0
; CHECK: BL <mcsymbol __llvm_slsblr_thunk_x8>, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $w0, implicit killed $x8
renamable $x8 = ADRP target-flags(aarch64-page) @b
STRWui killed renamable $w0, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @b :: (store (s32) into @b)
early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 ; :: (load (s64) from %stack.0)
RET undef $lr
...
# CHECK: name: __llvm_slsblr_thunk_x8
#
# CHECK: $x16 = ORRXrs $xzr, $x8, 0
# CHECK-NEXT: BR $x16
# CHECK-NEXT: SpeculationBarrierISBDSBEndBB
# ASM-LABEL: __llvm_slsblr_thunk_x8:
# ASM-NEXT: mov x16, x8
# ASM-NEXT: br x16
# ASM-NEXT: dsb sy
# ASM-NEXT: isb