llvm/llvm/test/CodeGen/AArch64/machine_cse_impdef_killflags.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64-apple-ios -fast-isel -verify-machineinstrs | FileCheck %s

; Check that the kill flag is cleared between CSE'd instructions on their
; imp-def'd registers.
; The verifier would complain otherwise.
define i64 @csed_impdef_killflag(i64 %a) {
; CHECK-LABEL: csed_impdef_killflag:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    mov w8, #1 ; =0x1
; CHECK-NEXT:    cmp x0, #0
; CHECK-NEXT:    mov x9, #2 ; =0x2
; CHECK-NEXT:    csel w8, wzr, w8, ne
; CHECK-NEXT:    mov x10, #3 ; =0x3
; CHECK-NEXT:    lsr w8, w8, #0
; CHECK-NEXT:    csel x9, x9, x10, ne
; CHECK-NEXT:    add x0, x9, x8
; CHECK-NEXT:    ret

  %1 = icmp ne i64 %a, 0
  %2 = select i1 %1, i32 0, i32 1
  %3 = icmp ne i64 %a, 0
  %4 = select i1 %3, i64 2, i64 3
  %5 = zext i32 %2 to i64
  %6 = add i64 %4, %5
  ret i64 %6
}