# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=arm-ldst-opt %s -o - | FileCheck %s
--- |
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv7m-none-unknown-eabi"
define ptr @STR_pre4(ptr %p, i32 %v) { unreachable }
define ptr @STR_pre8(ptr %p, i32 %v) { unreachable }
define ptr @STR_pre255(ptr %p, i32 %v) { unreachable }
define ptr @STR_pre256(ptr %p, i32 %v) { unreachable }
define ptr @STRD_pre4(ptr %p, i32 %v) { unreachable }
define ptr @STRD_pre8(ptr %p, i32 %v) { unreachable }
define ptr @STRD_pre255(ptr %p, i32 %v) { unreachable }
define ptr @STRD_pre256(ptr %p, i32 %v) { unreachable }
define ptr @STRD_pre1020(ptr %p, i32 %v) { unreachable }
define ptr @STRD_pre1024(ptr %p, i32 %v) { unreachable }
define ptr @STRD_prem4(ptr %p, i32 %v) { unreachable }
define ptr @STRD_prem8(ptr %p, i32 %v) { unreachable }
define ptr @STRD_prem255(ptr %p, i32 %v) { unreachable }
define ptr @STRD_prem256(ptr %p, i32 %v) { unreachable }
define ptr @STRD_prem1020(ptr %p, i32 %v) { unreachable }
define ptr @STRD_prem1024(ptr %p, i32 %v) { unreachable }
define ptr @STR_post4(ptr %p, i32 %v) { unreachable }
define ptr @STR_post8(ptr %p, i32 %v) { unreachable }
define ptr @STR_post255(ptr %p, i32 %v) { unreachable }
define ptr @STR_post256(ptr %p, i32 %v) { unreachable }
define ptr @STRD_post4(ptr %p, i32 %v) { unreachable }
define ptr @STRD_post8(ptr %p, i32 %v) { unreachable }
define ptr @STRD_post255(ptr %p, i32 %v) { unreachable }
define ptr @STRD_post256(ptr %p, i32 %v) { unreachable }
define ptr @STRD_post1020(ptr %p, i32 %v) { unreachable }
define ptr @STRD_post1024(ptr %p, i32 %v) { unreachable }
define ptr @STRD_postm4(ptr %p, i32 %v) { unreachable }
define ptr @STRD_postm8(ptr %p, i32 %v) { unreachable }
define ptr @STRD_postm255(ptr %p, i32 %v) { unreachable }
define ptr @STRD_postm256(ptr %p, i32 %v) { unreachable }
define ptr @STRD_postm1020(ptr %p, i32 %v) { unreachable }
define ptr @STRD_postm1024(ptr %p, i32 %v) { unreachable }
...
---
name: STR_pre4
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1
; CHECK-LABEL: name: STR_pre4
; CHECK: liveins: $r0, $r1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $r0 = t2STR_PRE killed $r1, $r0, 4, 14 /* CC::al */, $noreg :: (store (s32))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STR_pre8
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1
; CHECK-LABEL: name: STR_pre8
; CHECK: liveins: $r0, $r1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STR_pre255
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1
; CHECK-LABEL: name: STR_pre255
; CHECK: liveins: $r0, $r1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STR_pre256
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1
; CHECK-LABEL: name: STR_pre256
; CHECK: liveins: $r0, $r1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_pre4
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_pre4
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_pre8
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_pre8
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_PRE killed renamable $r1, killed renamable $r2, killed $r0, 8, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_pre255
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_pre255
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_pre256
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_pre256
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_pre1020
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_pre1020
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_pre1024
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_pre1024
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_prem4
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_prem4
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_prem8
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_prem8
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_PRE killed renamable $r1, killed renamable $r2, killed $r0, -8, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_prem255
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_prem255
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_prem256
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_prem256
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_prem1020
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_prem1020
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_prem1024
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_prem1024
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STR_post4
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1
; CHECK-LABEL: name: STR_post4
; CHECK: liveins: $r0, $r1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $r0 = t2STR_POST killed $r1, $r0, 4, 14 /* CC::al */, $noreg :: (store (s32))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STR_post8
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1
; CHECK-LABEL: name: STR_post8
; CHECK: liveins: $r0, $r1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $r0 = t2STR_POST killed $r1, $r0, 8, 14 /* CC::al */, $noreg :: (store (s32))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STR_post255
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1
; CHECK-LABEL: name: STR_post255
; CHECK: liveins: $r0, $r1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $r0 = t2STR_POST killed $r1, $r0, 255, 14 /* CC::al */, $noreg :: (store (s32))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STR_post256
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1
; CHECK-LABEL: name: STR_post256
; CHECK: liveins: $r0, $r1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_post4
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_post4
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 4, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_post8
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_post8
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 8, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_post255
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_post255
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_post256
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_post256
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 256, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_post1020
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_post1020
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 1020, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_post1024
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_post1024
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_postm4
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_postm4
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -4, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_postm8
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_postm8
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -8, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_postm255
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_postm255
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_postm256
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_postm256
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 256, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_postm1020
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_postm1020
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -1020, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
---
name: STRD_postm1024
alignment: 2
tracksRegLiveness: true
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
- { reg: '$r2', virtual-reg: '' }
body: |
bb.0 (%ir-block.0):
liveins: $r0, $r1, $r2
; CHECK-LABEL: name: STRD_postm1024
; CHECK: liveins: $r0, $r1, $r2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
...
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