llvm/llvm/test/CodeGen/ARM/GlobalISel/thumb-select-phi.mir

# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
  define void @test_phi_s32() { ret void }
...
---
name:            test_phi_s32
# CHECK-LABEL: name: test_phi_s32
legalized:       true
regBankSelected: true
selected:        false
# CHECK: selected: true
tracksRegLiveness: true
registers:
  - { id: 0, class: gprb }
  - { id: 1, class: gprb }
  - { id: 2, class: gprb }
  - { id: 3, class: gprb }
  - { id: 4, class: gprb }
body:             |
  bb.0:
  ; CHECK: [[BB1:bb.0]]:
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $r0, $r1, $r2

    %0(s32) = COPY $r0
    %1(s1) = G_TRUNC %0(s32)

    %2(s32) = COPY $r1
    %3(s32) = COPY $r2
    ; CHECK: [[V1:%[0-9]+]]:gpr = COPY $r1
    ; CHECK: [[V2:%[0-9]+]]:gpr = COPY $r2

    G_BRCOND %1(s1), %bb.1
    G_BR %bb.2

  bb.1:
  ; CHECK: [[BB2:bb.1]]:
    successors: %bb.2(0x80000000)

    G_BR %bb.2
    ; CHECK: B %bb.2

  bb.2:
  ; CHECK: bb.2
    %4(s32) = G_PHI %2(s32), %bb.0, %3(s32), %bb.1
    ; CHECK: {{%[0-9]+}}:gpr = PHI [[V1]], %[[BB1]], [[V2]], %[[BB2]]

    $r0 = COPY %4(s32)
    BX_RET 14, $noreg, implicit $r0
...