llvm/llvm/test/MC/Disassembler/AArch64/armv8.6a-ecv.txt

# RUN: llvm-mc -triple=aarch64  -mattr=+ecv -disassemble < %s      | FileCheck %s
# RUN: llvm-mc -triple=aarch64              -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOFGT

[0x81,0xe0,0x1c,0xd5]
[0xab,0xe0,0x1c,0xd5]
[0xd6,0xe0,0x1c,0xd5]
[0xe3,0xe0,0x1c,0xd5]
[0xad,0xe0,0x1b,0xd5]
[0xd7,0xe0,0x1b,0xd5]
# CHECK: msr CNTSCALE_EL2, x1
# CHECK: msr CNTISCALE_EL2, x11
# CHECK: msr CNTPOFF_EL2, x22
# CHECK: msr CNTVFRQ_EL2, x3
# CHECK: msr S3_3_C14_C0_5, x13
# CHECK: msr S3_3_C14_C0_6, x23
# NOFGT: msr S3_4_C14_C0_4, x1
# NOFGT: msr S3_4_C14_C0_5, x11
# NOFGT: msr S3_4_C14_C0_6, x22
# NOFGT: msr S3_4_C14_C0_7, x3
# NOFGT: msr S3_3_C14_C0_5, x13
# NOFGT: msr S3_3_C14_C0_6, x23

[0x80,0xe0,0x3c,0xd5]
[0xa5,0xe0,0x3c,0xd5]
[0xca,0xe0,0x3c,0xd5]
[0xef,0xe0,0x3c,0xd5]
[0xb4,0xe0,0x3b,0xd5]
[0xde,0xe0,0x3b,0xd5]
# CHECK: mrs x0, CNTSCALE_EL2
# CHECK: mrs x5, CNTISCALE_EL2
# CHECK: mrs x10, CNTPOFF_EL2
# CHECK: mrs x15, CNTVFRQ_EL2
# CHECK: mrs x20, CNTPCTSS_EL0
# CHECK: mrs x30, CNTVCTSS_EL0
# NOFGT: mrs x0, S3_4_C14_C0_4
# NOFGT: mrs x5, S3_4_C14_C0_5
# NOFGT: mrs x10, S3_4_C14_C0_6
# NOFGT: mrs x15, S3_4_C14_C0_7
# NOFGT: mrs x20, S3_3_C14_C0_5
# NOFGT: mrs x30, S3_3_C14_C0_6