llvm/mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp

//===- ControlFlowOps.cpp - MLIR SPIR-V Control Flow Ops  -----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines the control flow operations in the SPIR-V dialect.
//
//===----------------------------------------------------------------------===//

#include "mlir/Dialect/SPIRV/IR/SPIRVEnums.h"
#include "mlir/Dialect/SPIRV/IR/SPIRVOps.h"
#include "mlir/Dialect/SPIRV/IR/SPIRVTypes.h"
#include "mlir/Interfaces/CallInterfaces.h"

#include "SPIRVOpUtils.h"
#include "SPIRVParsingUtils.h"

usingnamespacemlir::spirv::AttrNames;

namespace mlir::spirv {

/// Parses Function, Selection and Loop control attributes. If no control is
/// specified, "None" is used as a default.
template <typename EnumAttrClass, typename EnumClass>
static ParseResult
parseControlAttribute(OpAsmParser &parser, OperationState &state,
                      StringRef attrName = spirv::attributeName<EnumClass>()) {}

//===----------------------------------------------------------------------===//
// spirv.BranchOp
//===----------------------------------------------------------------------===//

SuccessorOperands BranchOp::getSuccessorOperands(unsigned index) {}

//===----------------------------------------------------------------------===//
// spirv.BranchConditionalOp
//===----------------------------------------------------------------------===//

SuccessorOperands BranchConditionalOp::getSuccessorOperands(unsigned index) {}

ParseResult BranchConditionalOp::parse(OpAsmParser &parser,
                                       OperationState &result) {}

void BranchConditionalOp::print(OpAsmPrinter &printer) {}

LogicalResult BranchConditionalOp::verify() {}

//===----------------------------------------------------------------------===//
// spirv.FunctionCall
//===----------------------------------------------------------------------===//

LogicalResult FunctionCallOp::verify() {}

CallInterfaceCallable FunctionCallOp::getCallableForCallee() {}

void FunctionCallOp::setCalleeFromCallable(CallInterfaceCallable callee) {}

Operation::operand_range FunctionCallOp::getArgOperands() {}

MutableOperandRange FunctionCallOp::getArgOperandsMutable() {}

//===----------------------------------------------------------------------===//
// spirv.mlir.loop
//===----------------------------------------------------------------------===//

void LoopOp::build(OpBuilder &builder, OperationState &state) {}

ParseResult LoopOp::parse(OpAsmParser &parser, OperationState &result) {}

void LoopOp::print(OpAsmPrinter &printer) {}

/// Returns true if the given `srcBlock` contains only one `spirv.Branch` to the
/// given `dstBlock`.
static bool hasOneBranchOpTo(Block &srcBlock, Block &dstBlock) {}

/// Returns true if the given `block` only contains one `spirv.mlir.merge` op.
static bool isMergeBlock(Block &block) {}

LogicalResult LoopOp::verifyRegions() {}

Block *LoopOp::getEntryBlock() {}

Block *LoopOp::getHeaderBlock() {}

Block *LoopOp::getContinueBlock() {}

Block *LoopOp::getMergeBlock() {}

void LoopOp::addEntryAndMergeBlock(OpBuilder &builder) {}

//===----------------------------------------------------------------------===//
// spirv.mlir.merge
//===----------------------------------------------------------------------===//

LogicalResult MergeOp::verify() {}

//===----------------------------------------------------------------------===//
// spirv.Return
//===----------------------------------------------------------------------===//

LogicalResult ReturnOp::verify() {}

//===----------------------------------------------------------------------===//
// spirv.ReturnValue
//===----------------------------------------------------------------------===//

LogicalResult ReturnValueOp::verify() {}

//===----------------------------------------------------------------------===//
// spirv.Select
//===----------------------------------------------------------------------===//

LogicalResult SelectOp::verify() {}

// Custom availability implementation is needed for spirv.Select given the
// syntax changes starting v1.4.
SmallVector<ArrayRef<spirv::Extension>, 1> SelectOp::getExtensions() {}
SmallVector<ArrayRef<spirv::Capability>, 1> SelectOp::getCapabilities() {}
std::optional<spirv::Version> SelectOp::getMinVersion() {}
std::optional<spirv::Version> SelectOp::getMaxVersion() {}

//===----------------------------------------------------------------------===//
// spirv.mlir.selection
//===----------------------------------------------------------------------===//

ParseResult SelectionOp::parse(OpAsmParser &parser, OperationState &result) {}

void SelectionOp::print(OpAsmPrinter &printer) {}

LogicalResult SelectionOp::verifyRegions() {}

Block *SelectionOp::getHeaderBlock() {}

Block *SelectionOp::getMergeBlock() {}

void SelectionOp::addMergeBlock(OpBuilder &builder) {}

SelectionOp
SelectionOp::createIfThen(Location loc, Value condition,
                          function_ref<void(OpBuilder &builder)> thenBody,
                          OpBuilder &builder) {}

//===----------------------------------------------------------------------===//
// spirv.Unreachable
//===----------------------------------------------------------------------===//

LogicalResult spirv::UnreachableOp::verify() {}

} // namespace mlir::spirv