# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
# ATT: vcvt2ps2phx %ymm24, %ymm23, %ymm22
# INTEL: vcvt2ps2phx ymm22, ymm23, ymm24
0x62,0x82,0x45,0x20,0x67,0xf0
# ATT: vcvt2ps2phx {rn-sae}, %ymm24, %ymm23, %ymm22
# INTEL: vcvt2ps2phx ymm22, ymm23, ymm24, {rn-sae}
0x62,0x82,0x41,0x10,0x67,0xf0
# ATT: vcvt2ps2phx %ymm24, %ymm23, %ymm22 {%k7}
# INTEL: vcvt2ps2phx ymm22 {k7}, ymm23, ymm24
0x62,0x82,0x45,0x27,0x67,0xf0
# ATT: vcvt2ps2phx {rz-sae}, %ymm24, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvt2ps2phx ymm22 {k7} {z}, ymm23, ymm24, {rz-sae}
0x62,0x82,0x41,0xf7,0x67,0xf0
# ATT: vcvt2ps2phx %zmm24, %zmm23, %zmm22
# INTEL: vcvt2ps2phx zmm22, zmm23, zmm24
0x62,0x82,0x45,0x40,0x67,0xf0
# ATT: vcvt2ps2phx {rn-sae}, %zmm24, %zmm23, %zmm22
# INTEL: vcvt2ps2phx zmm22, zmm23, zmm24, {rn-sae}
0x62,0x82,0x45,0x10,0x67,0xf0
# ATT: vcvt2ps2phx %zmm24, %zmm23, %zmm22 {%k7}
# INTEL: vcvt2ps2phx zmm22 {k7}, zmm23, zmm24
0x62,0x82,0x45,0x47,0x67,0xf0
# ATT: vcvt2ps2phx {rz-sae}, %zmm24, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvt2ps2phx zmm22 {k7} {z}, zmm23, zmm24, {rz-sae}
0x62,0x82,0x45,0xf7,0x67,0xf0
# ATT: vcvt2ps2phx %xmm24, %xmm23, %xmm22
# INTEL: vcvt2ps2phx xmm22, xmm23, xmm24
0x62,0x82,0x45,0x00,0x67,0xf0
# ATT: vcvt2ps2phx %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvt2ps2phx xmm22 {k7}, xmm23, xmm24
0x62,0x82,0x45,0x07,0x67,0xf0
# ATT: vcvt2ps2phx %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvt2ps2phx xmm22 {k7} {z}, xmm23, xmm24
0x62,0x82,0x45,0x87,0x67,0xf0
# ATT: vcvt2ps2phx 268435456(%rbp,%r14,8), %zmm23, %zmm22
# INTEL: vcvt2ps2phx zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x45,0x40,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvt2ps2phx 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
# INTEL: vcvt2ps2phx zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x45,0x47,0x67,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvt2ps2phx (%rip){1to16}, %zmm23, %zmm22
# INTEL: vcvt2ps2phx zmm22, zmm23, dword ptr [rip]{1to16}
0x62,0xe2,0x45,0x50,0x67,0x35,0x00,0x00,0x00,0x00
# ATT: vcvt2ps2phx -2048(,%rbp,2), %zmm23, %zmm22
# INTEL: vcvt2ps2phx zmm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe2,0x45,0x40,0x67,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvt2ps2phx 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvt2ps2phx zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe2,0x45,0xc7,0x67,0x71,0x7f
# ATT: vcvt2ps2phx -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvt2ps2phx zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
0x62,0xe2,0x45,0xd7,0x67,0x72,0x80
# ATT: vcvt2ps2phx 268435456(%rbp,%r14,8), %ymm23, %ymm22
# INTEL: vcvt2ps2phx ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x45,0x20,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvt2ps2phx 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
# INTEL: vcvt2ps2phx ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x45,0x27,0x67,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvt2ps2phx (%rip){1to8}, %ymm23, %ymm22
# INTEL: vcvt2ps2phx ymm22, ymm23, dword ptr [rip]{1to8}
0x62,0xe2,0x45,0x30,0x67,0x35,0x00,0x00,0x00,0x00
# ATT: vcvt2ps2phx -1024(,%rbp,2), %ymm23, %ymm22
# INTEL: vcvt2ps2phx ymm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe2,0x45,0x20,0x67,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvt2ps2phx 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvt2ps2phx ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe2,0x45,0xa7,0x67,0x71,0x7f
# ATT: vcvt2ps2phx -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvt2ps2phx ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
0x62,0xe2,0x45,0xb7,0x67,0x72,0x80
# ATT: vcvt2ps2phx 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvt2ps2phx xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x45,0x00,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvt2ps2phx 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvt2ps2phx xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x45,0x07,0x67,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvt2ps2phx (%rip){1to4}, %xmm23, %xmm22
# INTEL: vcvt2ps2phx xmm22, xmm23, dword ptr [rip]{1to4}
0x62,0xe2,0x45,0x10,0x67,0x35,0x00,0x00,0x00,0x00
# ATT: vcvt2ps2phx -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvt2ps2phx xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe2,0x45,0x00,0x67,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvt2ps2phx 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvt2ps2phx xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe2,0x45,0x87,0x67,0x71,0x7f
# ATT: vcvt2ps2phx -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvt2ps2phx xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
0x62,0xe2,0x45,0x97,0x67,0x72,0x80
# ATT: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22
# INTEL: vcvtbiasph2bf8 ymm22, zmm23, zmm24
0x62,0x82,0x44,0x40,0x74,0xf0
# ATT: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22 {%k7}
# INTEL: vcvtbiasph2bf8 ymm22 {k7}, zmm23, zmm24
0x62,0x82,0x44,0x47,0x74,0xf0
# ATT: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, zmm24
0x62,0x82,0x44,0xc7,0x74,0xf0
# ATT: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22
# INTEL: vcvtbiasph2bf8 xmm22, xmm23, xmm24
0x62,0x82,0x44,0x00,0x74,0xf0
# ATT: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2bf8 xmm22 {k7}, xmm23, xmm24
0x62,0x82,0x44,0x07,0x74,0xf0
# ATT: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, xmm24
0x62,0x82,0x44,0x87,0x74,0xf0
# ATT: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22
# INTEL: vcvtbiasph2bf8 xmm22, ymm23, ymm24
0x62,0x82,0x44,0x20,0x74,0xf0
# ATT: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2bf8 xmm22 {k7}, ymm23, ymm24
0x62,0x82,0x44,0x27,0x74,0xf0
# ATT: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, ymm24
0x62,0x82,0x44,0xa7,0x74,0xf0
# ATT: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %ymm23, %xmm22
# INTEL: vcvtbiasph2bf8 xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x44,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2bf8 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2bf8 xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x44,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2bf8 (%rip){1to16}, %ymm23, %xmm22
# INTEL: vcvtbiasph2bf8 xmm22, ymm23, word ptr [rip]{1to16}
0x62,0xe2,0x44,0x30,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2bf8 -1024(,%rbp,2), %ymm23, %xmm22
# INTEL: vcvtbiasph2bf8 xmm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe2,0x44,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtbiasph2bf8 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe2,0x44,0xa7,0x74,0x71,0x7f
# ATT: vcvtbiasph2bf8 -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
0x62,0xe2,0x44,0xb7,0x74,0x72,0x80
# ATT: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %zmm23, %ymm22
# INTEL: vcvtbiasph2bf8 ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x44,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2bf8 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
# INTEL: vcvtbiasph2bf8 ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x44,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2bf8 (%rip){1to32}, %zmm23, %ymm22
# INTEL: vcvtbiasph2bf8 ymm22, zmm23, word ptr [rip]{1to32}
0x62,0xe2,0x44,0x50,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2bf8 -2048(,%rbp,2), %zmm23, %ymm22
# INTEL: vcvtbiasph2bf8 ymm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe2,0x44,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtbiasph2bf8 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe2,0x44,0xc7,0x74,0x71,0x7f
# ATT: vcvtbiasph2bf8 -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
0x62,0xe2,0x44,0xd7,0x74,0x72,0x80
# ATT: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvtbiasph2bf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x44,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2bf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2bf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x44,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2bf8 (%rip){1to8}, %xmm23, %xmm22
# INTEL: vcvtbiasph2bf8 xmm22, xmm23, word ptr [rip]{1to8}
0x62,0xe2,0x44,0x10,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2bf8 -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvtbiasph2bf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe2,0x44,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtbiasph2bf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe2,0x44,0x87,0x74,0x71,0x7f
# ATT: vcvtbiasph2bf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
0x62,0xe2,0x44,0x97,0x74,0x72,0x80
# ATT: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22
# INTEL: vcvtbiasph2bf8s ymm22, zmm23, zmm24
0x62,0x85,0x44,0x40,0x74,0xf0
# ATT: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22 {%k7}
# INTEL: vcvtbiasph2bf8s ymm22 {k7}, zmm23, zmm24
0x62,0x85,0x44,0x47,0x74,0xf0
# ATT: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, zmm24
0x62,0x85,0x44,0xc7,0x74,0xf0
# ATT: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22
# INTEL: vcvtbiasph2bf8s xmm22, xmm23, xmm24
0x62,0x85,0x44,0x00,0x74,0xf0
# ATT: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2bf8s xmm22 {k7}, xmm23, xmm24
0x62,0x85,0x44,0x07,0x74,0xf0
# ATT: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, xmm24
0x62,0x85,0x44,0x87,0x74,0xf0
# ATT: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22
# INTEL: vcvtbiasph2bf8s xmm22, ymm23, ymm24
0x62,0x85,0x44,0x20,0x74,0xf0
# ATT: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2bf8s xmm22 {k7}, ymm23, ymm24
0x62,0x85,0x44,0x27,0x74,0xf0
# ATT: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, ymm24
0x62,0x85,0x44,0xa7,0x74,0xf0
# ATT: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %ymm23, %xmm22
# INTEL: vcvtbiasph2bf8s xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2bf8s 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2bf8s xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2bf8s (%rip){1to16}, %ymm23, %xmm22
# INTEL: vcvtbiasph2bf8s xmm22, ymm23, word ptr [rip]{1to16}
0x62,0xe5,0x44,0x30,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2bf8s -1024(,%rbp,2), %ymm23, %xmm22
# INTEL: vcvtbiasph2bf8s xmm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x44,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtbiasph2bf8s 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe5,0x44,0xa7,0x74,0x71,0x7f
# ATT: vcvtbiasph2bf8s -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x44,0xb7,0x74,0x72,0x80
# ATT: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %zmm23, %ymm22
# INTEL: vcvtbiasph2bf8s ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2bf8s 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
# INTEL: vcvtbiasph2bf8s ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2bf8s (%rip){1to32}, %zmm23, %ymm22
# INTEL: vcvtbiasph2bf8s ymm22, zmm23, word ptr [rip]{1to32}
0x62,0xe5,0x44,0x50,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2bf8s -2048(,%rbp,2), %zmm23, %ymm22
# INTEL: vcvtbiasph2bf8s ymm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x44,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtbiasph2bf8s 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe5,0x44,0xc7,0x74,0x71,0x7f
# ATT: vcvtbiasph2bf8s -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x44,0xd7,0x74,0x72,0x80
# ATT: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvtbiasph2bf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2bf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2bf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2bf8s (%rip){1to8}, %xmm23, %xmm22
# INTEL: vcvtbiasph2bf8s xmm22, xmm23, word ptr [rip]{1to8}
0x62,0xe5,0x44,0x10,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2bf8s -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvtbiasph2bf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x44,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtbiasph2bf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe5,0x44,0x87,0x74,0x71,0x7f
# ATT: vcvtbiasph2bf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x44,0x97,0x74,0x72,0x80
# ATT: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22
# INTEL: vcvtbiasph2hf8 ymm22, zmm23, zmm24
0x62,0x85,0x44,0x40,0x18,0xf0
# ATT: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22 {%k7}
# INTEL: vcvtbiasph2hf8 ymm22 {k7}, zmm23, zmm24
0x62,0x85,0x44,0x47,0x18,0xf0
# ATT: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, zmm24
0x62,0x85,0x44,0xc7,0x18,0xf0
# ATT: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22
# INTEL: vcvtbiasph2hf8 xmm22, xmm23, xmm24
0x62,0x85,0x44,0x00,0x18,0xf0
# ATT: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2hf8 xmm22 {k7}, xmm23, xmm24
0x62,0x85,0x44,0x07,0x18,0xf0
# ATT: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, xmm24
0x62,0x85,0x44,0x87,0x18,0xf0
# ATT: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22
# INTEL: vcvtbiasph2hf8 xmm22, ymm23, ymm24
0x62,0x85,0x44,0x20,0x18,0xf0
# ATT: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2hf8 xmm22 {k7}, ymm23, ymm24
0x62,0x85,0x44,0x27,0x18,0xf0
# ATT: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, ymm24
0x62,0x85,0x44,0xa7,0x18,0xf0
# ATT: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %ymm23, %xmm22
# INTEL: vcvtbiasph2hf8 xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x20,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2hf8 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2hf8 xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x27,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2hf8 (%rip){1to16}, %ymm23, %xmm22
# INTEL: vcvtbiasph2hf8 xmm22, ymm23, word ptr [rip]{1to16}
0x62,0xe5,0x44,0x30,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2hf8 -1024(,%rbp,2), %ymm23, %xmm22
# INTEL: vcvtbiasph2hf8 xmm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x44,0x20,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtbiasph2hf8 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe5,0x44,0xa7,0x18,0x71,0x7f
# ATT: vcvtbiasph2hf8 -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x44,0xb7,0x18,0x72,0x80
# ATT: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %zmm23, %ymm22
# INTEL: vcvtbiasph2hf8 ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x40,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2hf8 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
# INTEL: vcvtbiasph2hf8 ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x47,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2hf8 (%rip){1to32}, %zmm23, %ymm22
# INTEL: vcvtbiasph2hf8 ymm22, zmm23, word ptr [rip]{1to32}
0x62,0xe5,0x44,0x50,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2hf8 -2048(,%rbp,2), %zmm23, %ymm22
# INTEL: vcvtbiasph2hf8 ymm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x44,0x40,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtbiasph2hf8 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe5,0x44,0xc7,0x18,0x71,0x7f
# ATT: vcvtbiasph2hf8 -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x44,0xd7,0x18,0x72,0x80
# ATT: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvtbiasph2hf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x00,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2hf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2hf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x07,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2hf8 (%rip){1to8}, %xmm23, %xmm22
# INTEL: vcvtbiasph2hf8 xmm22, xmm23, word ptr [rip]{1to8}
0x62,0xe5,0x44,0x10,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2hf8 -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvtbiasph2hf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x44,0x00,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtbiasph2hf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe5,0x44,0x87,0x18,0x71,0x7f
# ATT: vcvtbiasph2hf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x44,0x97,0x18,0x72,0x80
# ATT: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22
# INTEL: vcvtbiasph2hf8s ymm22, zmm23, zmm24
0x62,0x85,0x44,0x40,0x1b,0xf0
# ATT: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22 {%k7}
# INTEL: vcvtbiasph2hf8s ymm22 {k7}, zmm23, zmm24
0x62,0x85,0x44,0x47,0x1b,0xf0
# ATT: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, zmm24
0x62,0x85,0x44,0xc7,0x1b,0xf0
# ATT: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22
# INTEL: vcvtbiasph2hf8s xmm22, xmm23, xmm24
0x62,0x85,0x44,0x00,0x1b,0xf0
# ATT: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2hf8s xmm22 {k7}, xmm23, xmm24
0x62,0x85,0x44,0x07,0x1b,0xf0
# ATT: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, xmm24
0x62,0x85,0x44,0x87,0x1b,0xf0
# ATT: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22
# INTEL: vcvtbiasph2hf8s xmm22, ymm23, ymm24
0x62,0x85,0x44,0x20,0x1b,0xf0
# ATT: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2hf8s xmm22 {k7}, ymm23, ymm24
0x62,0x85,0x44,0x27,0x1b,0xf0
# ATT: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, ymm24
0x62,0x85,0x44,0xa7,0x1b,0xf0
# ATT: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %ymm23, %xmm22
# INTEL: vcvtbiasph2hf8s xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x20,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2hf8s 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2hf8s xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x27,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2hf8s (%rip){1to16}, %ymm23, %xmm22
# INTEL: vcvtbiasph2hf8s xmm22, ymm23, word ptr [rip]{1to16}
0x62,0xe5,0x44,0x30,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2hf8s -1024(,%rbp,2), %ymm23, %xmm22
# INTEL: vcvtbiasph2hf8s xmm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x44,0x20,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtbiasph2hf8s 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe5,0x44,0xa7,0x1b,0x71,0x7f
# ATT: vcvtbiasph2hf8s -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x44,0xb7,0x1b,0x72,0x80
# ATT: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %zmm23, %ymm22
# INTEL: vcvtbiasph2hf8s ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x40,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2hf8s 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
# INTEL: vcvtbiasph2hf8s ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x47,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2hf8s (%rip){1to32}, %zmm23, %ymm22
# INTEL: vcvtbiasph2hf8s ymm22, zmm23, word ptr [rip]{1to32}
0x62,0xe5,0x44,0x50,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2hf8s -2048(,%rbp,2), %zmm23, %ymm22
# INTEL: vcvtbiasph2hf8s ymm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x44,0x40,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtbiasph2hf8s 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe5,0x44,0xc7,0x1b,0x71,0x7f
# ATT: vcvtbiasph2hf8s -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x44,0xd7,0x1b,0x72,0x80
# ATT: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvtbiasph2hf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x44,0x00,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtbiasph2hf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvtbiasph2hf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x44,0x07,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtbiasph2hf8s (%rip){1to8}, %xmm23, %xmm22
# INTEL: vcvtbiasph2hf8s xmm22, xmm23, word ptr [rip]{1to8}
0x62,0xe5,0x44,0x10,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtbiasph2hf8s -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvtbiasph2hf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x44,0x00,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtbiasph2hf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe5,0x44,0x87,0x1b,0x71,0x7f
# ATT: vcvtbiasph2hf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x44,0x97,0x1b,0x72,0x80
# ATT: vcvthf82ph %xmm23, %xmm22
# INTEL: vcvthf82ph xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x1e,0xf7
# ATT: vcvthf82ph %xmm23, %xmm22 {%k7}
# INTEL: vcvthf82ph xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x1e,0xf7
# ATT: vcvthf82ph %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvthf82ph xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x1e,0xf7
# ATT: vcvthf82ph %xmm23, %ymm22
# INTEL: vcvthf82ph ymm22, xmm23
0x62,0xa5,0x7f,0x28,0x1e,0xf7
# ATT: vcvthf82ph %xmm23, %ymm22 {%k7}
# INTEL: vcvthf82ph ymm22 {k7}, xmm23
0x62,0xa5,0x7f,0x2f,0x1e,0xf7
# ATT: vcvthf82ph %xmm23, %ymm22 {%k7} {z}
# INTEL: vcvthf82ph ymm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0xaf,0x1e,0xf7
# ATT: vcvthf82ph %ymm23, %zmm22
# INTEL: vcvthf82ph zmm22, ymm23
0x62,0xa5,0x7f,0x48,0x1e,0xf7
# ATT: vcvthf82ph %ymm23, %zmm22 {%k7}
# INTEL: vcvthf82ph zmm22 {k7}, ymm23
0x62,0xa5,0x7f,0x4f,0x1e,0xf7
# ATT: vcvthf82ph %ymm23, %zmm22 {%k7} {z}
# INTEL: vcvthf82ph zmm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xcf,0x1e,0xf7
# ATT: vcvthf82ph 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvthf82ph xmm22, qword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvthf82ph 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvthf82ph xmm22 {k7}, qword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvthf82ph (%rip), %xmm22
# INTEL: vcvthf82ph xmm22, qword ptr [rip]
0x62,0xe5,0x7f,0x08,0x1e,0x35,0x00,0x00,0x00,0x00
# ATT: vcvthf82ph -256(,%rbp,2), %xmm22
# INTEL: vcvthf82ph xmm22, qword ptr [2*rbp - 256]
0x62,0xe5,0x7f,0x08,0x1e,0x34,0x6d,0x00,0xff,0xff,0xff
# ATT: vcvthf82ph 1016(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvthf82ph xmm22 {k7} {z}, qword ptr [rcx + 1016]
0x62,0xe5,0x7f,0x8f,0x1e,0x71,0x7f
# ATT: vcvthf82ph -1024(%rdx), %xmm22 {%k7} {z}
# INTEL: vcvthf82ph xmm22 {k7} {z}, qword ptr [rdx - 1024]
0x62,0xe5,0x7f,0x8f,0x1e,0x72,0x80
# ATT: vcvthf82ph 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvthf82ph ymm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvthf82ph 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvthf82ph ymm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvthf82ph (%rip), %ymm22
# INTEL: vcvthf82ph ymm22, xmmword ptr [rip]
0x62,0xe5,0x7f,0x28,0x1e,0x35,0x00,0x00,0x00,0x00
# ATT: vcvthf82ph -512(,%rbp,2), %ymm22
# INTEL: vcvthf82ph ymm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x28,0x1e,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvthf82ph 2032(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvthf82ph ymm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0xaf,0x1e,0x71,0x7f
# ATT: vcvthf82ph -2048(%rdx), %ymm22 {%k7} {z}
# INTEL: vcvthf82ph ymm22 {k7} {z}, xmmword ptr [rdx - 2048]
0x62,0xe5,0x7f,0xaf,0x1e,0x72,0x80
# ATT: vcvthf82ph 268435456(%rbp,%r14,8), %zmm22
# INTEL: vcvthf82ph zmm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvthf82ph 291(%r8,%rax,4), %zmm22 {%k7}
# INTEL: vcvthf82ph zmm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvthf82ph (%rip), %zmm22
# INTEL: vcvthf82ph zmm22, ymmword ptr [rip]
0x62,0xe5,0x7f,0x48,0x1e,0x35,0x00,0x00,0x00,0x00
# ATT: vcvthf82ph -1024(,%rbp,2), %zmm22
# INTEL: vcvthf82ph zmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x48,0x1e,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvthf82ph 4064(%rcx), %zmm22 {%k7} {z}
# INTEL: vcvthf82ph zmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xcf,0x1e,0x71,0x7f
# ATT: vcvthf82ph -4096(%rdx), %zmm22 {%k7} {z}
# INTEL: vcvthf82ph zmm22 {k7} {z}, ymmword ptr [rdx - 4096]
0x62,0xe5,0x7f,0xcf,0x1e,0x72,0x80
# ATT: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22
# INTEL: vcvtne2ph2bf8 ymm22, ymm23, ymm24
0x62,0x82,0x47,0x20,0x74,0xf0
# ATT: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22 {%k7}
# INTEL: vcvtne2ph2bf8 ymm22 {k7}, ymm23, ymm24
0x62,0x82,0x47,0x27,0x74,0xf0
# ATT: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, ymm24
0x62,0x82,0x47,0xa7,0x74,0xf0
# ATT: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22
# INTEL: vcvtne2ph2bf8 zmm22, zmm23, zmm24
0x62,0x82,0x47,0x40,0x74,0xf0
# ATT: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22 {%k7}
# INTEL: vcvtne2ph2bf8 zmm22 {k7}, zmm23, zmm24
0x62,0x82,0x47,0x47,0x74,0xf0
# ATT: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, zmm24
0x62,0x82,0x47,0xc7,0x74,0xf0
# ATT: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22
# INTEL: vcvtne2ph2bf8 xmm22, xmm23, xmm24
0x62,0x82,0x47,0x00,0x74,0xf0
# ATT: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvtne2ph2bf8 xmm22 {k7}, xmm23, xmm24
0x62,0x82,0x47,0x07,0x74,0xf0
# ATT: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, xmm24
0x62,0x82,0x47,0x87,0x74,0xf0
# ATT: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %zmm23, %zmm22
# INTEL: vcvtne2ph2bf8 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x47,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2bf8 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
# INTEL: vcvtne2ph2bf8 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x47,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2bf8 (%rip){1to32}, %zmm23, %zmm22
# INTEL: vcvtne2ph2bf8 zmm22, zmm23, word ptr [rip]{1to32}
0x62,0xe2,0x47,0x50,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2bf8 -2048(,%rbp,2), %zmm23, %zmm22
# INTEL: vcvtne2ph2bf8 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe2,0x47,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtne2ph2bf8 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe2,0x47,0xc7,0x74,0x71,0x7f
# ATT: vcvtne2ph2bf8 -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
0x62,0xe2,0x47,0xd7,0x74,0x72,0x80
# ATT: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %ymm23, %ymm22
# INTEL: vcvtne2ph2bf8 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x47,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2bf8 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
# INTEL: vcvtne2ph2bf8 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x47,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2bf8 (%rip){1to16}, %ymm23, %ymm22
# INTEL: vcvtne2ph2bf8 ymm22, ymm23, word ptr [rip]{1to16}
0x62,0xe2,0x47,0x30,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2bf8 -1024(,%rbp,2), %ymm23, %ymm22
# INTEL: vcvtne2ph2bf8 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe2,0x47,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtne2ph2bf8 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe2,0x47,0xa7,0x74,0x71,0x7f
# ATT: vcvtne2ph2bf8 -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
0x62,0xe2,0x47,0xb7,0x74,0x72,0x80
# ATT: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvtne2ph2bf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x47,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2bf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvtne2ph2bf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x47,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2bf8 (%rip){1to8}, %xmm23, %xmm22
# INTEL: vcvtne2ph2bf8 xmm22, xmm23, word ptr [rip]{1to8}
0x62,0xe2,0x47,0x10,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2bf8 -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvtne2ph2bf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe2,0x47,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtne2ph2bf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe2,0x47,0x87,0x74,0x71,0x7f
# ATT: vcvtne2ph2bf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
0x62,0xe2,0x47,0x97,0x74,0x72,0x80
# ATT: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22
# INTEL: vcvtne2ph2bf8s ymm22, ymm23, ymm24
0x62,0x85,0x47,0x20,0x74,0xf0
# ATT: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22 {%k7}
# INTEL: vcvtne2ph2bf8s ymm22 {k7}, ymm23, ymm24
0x62,0x85,0x47,0x27,0x74,0xf0
# ATT: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, ymm24
0x62,0x85,0x47,0xa7,0x74,0xf0
# ATT: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22
# INTEL: vcvtne2ph2bf8s zmm22, zmm23, zmm24
0x62,0x85,0x47,0x40,0x74,0xf0
# ATT: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22 {%k7}
# INTEL: vcvtne2ph2bf8s zmm22 {k7}, zmm23, zmm24
0x62,0x85,0x47,0x47,0x74,0xf0
# ATT: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, zmm24
0x62,0x85,0x47,0xc7,0x74,0xf0
# ATT: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22
# INTEL: vcvtne2ph2bf8s xmm22, xmm23, xmm24
0x62,0x85,0x47,0x00,0x74,0xf0
# ATT: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvtne2ph2bf8s xmm22 {k7}, xmm23, xmm24
0x62,0x85,0x47,0x07,0x74,0xf0
# ATT: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, xmm24
0x62,0x85,0x47,0x87,0x74,0xf0
# ATT: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %zmm23, %zmm22
# INTEL: vcvtne2ph2bf8s zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2bf8s 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
# INTEL: vcvtne2ph2bf8s zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2bf8s (%rip){1to32}, %zmm23, %zmm22
# INTEL: vcvtne2ph2bf8s zmm22, zmm23, word ptr [rip]{1to32}
0x62,0xe5,0x47,0x50,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2bf8s -2048(,%rbp,2), %zmm23, %zmm22
# INTEL: vcvtne2ph2bf8s zmm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x47,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtne2ph2bf8s 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe5,0x47,0xc7,0x74,0x71,0x7f
# ATT: vcvtne2ph2bf8s -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x47,0xd7,0x74,0x72,0x80
# ATT: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %ymm23, %ymm22
# INTEL: vcvtne2ph2bf8s ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2bf8s 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
# INTEL: vcvtne2ph2bf8s ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2bf8s (%rip){1to16}, %ymm23, %ymm22
# INTEL: vcvtne2ph2bf8s ymm22, ymm23, word ptr [rip]{1to16}
0x62,0xe5,0x47,0x30,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2bf8s -1024(,%rbp,2), %ymm23, %ymm22
# INTEL: vcvtne2ph2bf8s ymm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x47,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtne2ph2bf8s 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe5,0x47,0xa7,0x74,0x71,0x7f
# ATT: vcvtne2ph2bf8s -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x47,0xb7,0x74,0x72,0x80
# ATT: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvtne2ph2bf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2bf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvtne2ph2bf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2bf8s (%rip){1to8}, %xmm23, %xmm22
# INTEL: vcvtne2ph2bf8s xmm22, xmm23, word ptr [rip]{1to8}
0x62,0xe5,0x47,0x10,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2bf8s -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvtne2ph2bf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x47,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtne2ph2bf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe5,0x47,0x87,0x74,0x71,0x7f
# ATT: vcvtne2ph2bf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x47,0x97,0x74,0x72,0x80
# ATT: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22
# INTEL: vcvtne2ph2hf8 ymm22, ymm23, ymm24
0x62,0x85,0x47,0x20,0x18,0xf0
# ATT: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22 {%k7}
# INTEL: vcvtne2ph2hf8 ymm22 {k7}, ymm23, ymm24
0x62,0x85,0x47,0x27,0x18,0xf0
# ATT: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, ymm24
0x62,0x85,0x47,0xa7,0x18,0xf0
# ATT: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22
# INTEL: vcvtne2ph2hf8 zmm22, zmm23, zmm24
0x62,0x85,0x47,0x40,0x18,0xf0
# ATT: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22 {%k7}
# INTEL: vcvtne2ph2hf8 zmm22 {k7}, zmm23, zmm24
0x62,0x85,0x47,0x47,0x18,0xf0
# ATT: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, zmm24
0x62,0x85,0x47,0xc7,0x18,0xf0
# ATT: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22
# INTEL: vcvtne2ph2hf8 xmm22, xmm23, xmm24
0x62,0x85,0x47,0x00,0x18,0xf0
# ATT: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvtne2ph2hf8 xmm22 {k7}, xmm23, xmm24
0x62,0x85,0x47,0x07,0x18,0xf0
# ATT: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, xmm24
0x62,0x85,0x47,0x87,0x18,0xf0
# ATT: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %zmm23, %zmm22
# INTEL: vcvtne2ph2hf8 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x40,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2hf8 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
# INTEL: vcvtne2ph2hf8 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x47,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2hf8 (%rip){1to32}, %zmm23, %zmm22
# INTEL: vcvtne2ph2hf8 zmm22, zmm23, word ptr [rip]{1to32}
0x62,0xe5,0x47,0x50,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2hf8 -2048(,%rbp,2), %zmm23, %zmm22
# INTEL: vcvtne2ph2hf8 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x47,0x40,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtne2ph2hf8 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe5,0x47,0xc7,0x18,0x71,0x7f
# ATT: vcvtne2ph2hf8 -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x47,0xd7,0x18,0x72,0x80
# ATT: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %ymm23, %ymm22
# INTEL: vcvtne2ph2hf8 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x20,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2hf8 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
# INTEL: vcvtne2ph2hf8 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x27,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2hf8 (%rip){1to16}, %ymm23, %ymm22
# INTEL: vcvtne2ph2hf8 ymm22, ymm23, word ptr [rip]{1to16}
0x62,0xe5,0x47,0x30,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2hf8 -1024(,%rbp,2), %ymm23, %ymm22
# INTEL: vcvtne2ph2hf8 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x47,0x20,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtne2ph2hf8 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe5,0x47,0xa7,0x18,0x71,0x7f
# ATT: vcvtne2ph2hf8 -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x47,0xb7,0x18,0x72,0x80
# ATT: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvtne2ph2hf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x00,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2hf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvtne2ph2hf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x07,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2hf8 (%rip){1to8}, %xmm23, %xmm22
# INTEL: vcvtne2ph2hf8 xmm22, xmm23, word ptr [rip]{1to8}
0x62,0xe5,0x47,0x10,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2hf8 -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvtne2ph2hf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x47,0x00,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtne2ph2hf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe5,0x47,0x87,0x18,0x71,0x7f
# ATT: vcvtne2ph2hf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x47,0x97,0x18,0x72,0x80
# ATT: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22
# INTEL: vcvtne2ph2hf8s ymm22, ymm23, ymm24
0x62,0x85,0x47,0x20,0x1b,0xf0
# ATT: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22 {%k7}
# INTEL: vcvtne2ph2hf8s ymm22 {k7}, ymm23, ymm24
0x62,0x85,0x47,0x27,0x1b,0xf0
# ATT: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, ymm24
0x62,0x85,0x47,0xa7,0x1b,0xf0
# ATT: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22
# INTEL: vcvtne2ph2hf8s zmm22, zmm23, zmm24
0x62,0x85,0x47,0x40,0x1b,0xf0
# ATT: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22 {%k7}
# INTEL: vcvtne2ph2hf8s zmm22 {k7}, zmm23, zmm24
0x62,0x85,0x47,0x47,0x1b,0xf0
# ATT: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, zmm24
0x62,0x85,0x47,0xc7,0x1b,0xf0
# ATT: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22
# INTEL: vcvtne2ph2hf8s xmm22, xmm23, xmm24
0x62,0x85,0x47,0x00,0x1b,0xf0
# ATT: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22 {%k7}
# INTEL: vcvtne2ph2hf8s xmm22 {k7}, xmm23, xmm24
0x62,0x85,0x47,0x07,0x1b,0xf0
# ATT: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, xmm24
0x62,0x85,0x47,0x87,0x1b,0xf0
# ATT: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %zmm23, %zmm22
# INTEL: vcvtne2ph2hf8s zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x40,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2hf8s 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
# INTEL: vcvtne2ph2hf8s zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x47,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2hf8s (%rip){1to32}, %zmm23, %zmm22
# INTEL: vcvtne2ph2hf8s zmm22, zmm23, word ptr [rip]{1to32}
0x62,0xe5,0x47,0x50,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2hf8s -2048(,%rbp,2), %zmm23, %zmm22
# INTEL: vcvtne2ph2hf8s zmm22, zmm23, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x47,0x40,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtne2ph2hf8s 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
0x62,0xe5,0x47,0xc7,0x1b,0x71,0x7f
# ATT: vcvtne2ph2hf8s -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x47,0xd7,0x1b,0x72,0x80
# ATT: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %ymm23, %ymm22
# INTEL: vcvtne2ph2hf8s ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x20,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2hf8s 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
# INTEL: vcvtne2ph2hf8s ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x27,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2hf8s (%rip){1to16}, %ymm23, %ymm22
# INTEL: vcvtne2ph2hf8s ymm22, ymm23, word ptr [rip]{1to16}
0x62,0xe5,0x47,0x30,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2hf8s -1024(,%rbp,2), %ymm23, %ymm22
# INTEL: vcvtne2ph2hf8s ymm22, ymm23, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x47,0x20,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtne2ph2hf8s 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
0x62,0xe5,0x47,0xa7,0x1b,0x71,0x7f
# ATT: vcvtne2ph2hf8s -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x47,0xb7,0x1b,0x72,0x80
# ATT: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
# INTEL: vcvtne2ph2hf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x47,0x00,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtne2ph2hf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
# INTEL: vcvtne2ph2hf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x47,0x07,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtne2ph2hf8s (%rip){1to8}, %xmm23, %xmm22
# INTEL: vcvtne2ph2hf8s xmm22, xmm23, word ptr [rip]{1to8}
0x62,0xe5,0x47,0x10,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtne2ph2hf8s -512(,%rbp,2), %xmm23, %xmm22
# INTEL: vcvtne2ph2hf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x47,0x00,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtne2ph2hf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
0x62,0xe5,0x47,0x87,0x1b,0x71,0x7f
# ATT: vcvtne2ph2hf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x47,0x97,0x1b,0x72,0x80
# ATT: vcvtneph2bf8 %xmm23, %xmm22
# INTEL: vcvtneph2bf8 xmm22, xmm23
0x62,0xa2,0x7e,0x08,0x74,0xf7
# ATT: vcvtneph2bf8 %xmm23, %xmm22 {%k7}
# INTEL: vcvtneph2bf8 xmm22 {k7}, xmm23
0x62,0xa2,0x7e,0x0f,0x74,0xf7
# ATT: vcvtneph2bf8 %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, xmm23
0x62,0xa2,0x7e,0x8f,0x74,0xf7
# ATT: vcvtneph2bf8 %zmm23, %ymm22
# INTEL: vcvtneph2bf8 ymm22, zmm23
0x62,0xa2,0x7e,0x48,0x74,0xf7
# ATT: vcvtneph2bf8 %zmm23, %ymm22 {%k7}
# INTEL: vcvtneph2bf8 ymm22 {k7}, zmm23
0x62,0xa2,0x7e,0x4f,0x74,0xf7
# ATT: vcvtneph2bf8 %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtneph2bf8 ymm22 {k7} {z}, zmm23
0x62,0xa2,0x7e,0xcf,0x74,0xf7
# ATT: vcvtneph2bf8 %ymm23, %xmm22
# INTEL: vcvtneph2bf8 xmm22, ymm23
0x62,0xa2,0x7e,0x28,0x74,0xf7
# ATT: vcvtneph2bf8 %ymm23, %xmm22 {%k7}
# INTEL: vcvtneph2bf8 xmm22 {k7}, ymm23
0x62,0xa2,0x7e,0x2f,0x74,0xf7
# ATT: vcvtneph2bf8 %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, ymm23
0x62,0xa2,0x7e,0xaf,0x74,0xf7
# ATT: vcvtneph2bf8x 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtneph2bf8 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x7e,0x08,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtneph2bf8x 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtneph2bf8 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x7e,0x0f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtneph2bf8 (%rip){1to8}, %xmm22
# INTEL: vcvtneph2bf8 xmm22, word ptr [rip]{1to8}
0x62,0xe2,0x7e,0x18,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2bf8x -512(,%rbp,2), %xmm22
# INTEL: vcvtneph2bf8 xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe2,0x7e,0x08,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtneph2bf8x 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe2,0x7e,0x8f,0x74,0x71,0x7f
# ATT: vcvtneph2bf8 -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe2,0x7e,0x9f,0x74,0x72,0x80
# ATT: vcvtneph2bf8 (%rip){1to16}, %xmm22
# INTEL: vcvtneph2bf8 xmm22, word ptr [rip]{1to16}
0x62,0xe2,0x7e,0x38,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2bf8y -1024(,%rbp,2), %xmm22
# INTEL: vcvtneph2bf8 xmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe2,0x7e,0x28,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtneph2bf8y 4064(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe2,0x7e,0xaf,0x74,0x71,0x7f
# ATT: vcvtneph2bf8 -256(%rdx){1to16}, %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe2,0x7e,0xbf,0x74,0x72,0x80
# ATT: vcvtneph2bf8 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtneph2bf8 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa2,0x7e,0x48,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtneph2bf8 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtneph2bf8 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc2,0x7e,0x4f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtneph2bf8 (%rip){1to32}, %ymm22
# INTEL: vcvtneph2bf8 ymm22, word ptr [rip]{1to32}
0x62,0xe2,0x7e,0x58,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2bf8 -2048(,%rbp,2), %ymm22
# INTEL: vcvtneph2bf8 ymm22, zmmword ptr [2*rbp - 2048]
0x62,0xe2,0x7e,0x48,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtneph2bf8 8128(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtneph2bf8 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe2,0x7e,0xcf,0x74,0x71,0x7f
# ATT: vcvtneph2bf8 -256(%rdx){1to32}, %ymm22 {%k7} {z}
# INTEL: vcvtneph2bf8 ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe2,0x7e,0xdf,0x74,0x72,0x80
# ATT: vcvtneph2bf8s %xmm23, %xmm22
# INTEL: vcvtneph2bf8s xmm22, xmm23
0x62,0xa5,0x7e,0x08,0x74,0xf7
# ATT: vcvtneph2bf8s %xmm23, %xmm22 {%k7}
# INTEL: vcvtneph2bf8s xmm22 {k7}, xmm23
0x62,0xa5,0x7e,0x0f,0x74,0xf7
# ATT: vcvtneph2bf8s %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7e,0x8f,0x74,0xf7
# ATT: vcvtneph2bf8s %zmm23, %ymm22
# INTEL: vcvtneph2bf8s ymm22, zmm23
0x62,0xa5,0x7e,0x48,0x74,0xf7
# ATT: vcvtneph2bf8s %zmm23, %ymm22 {%k7}
# INTEL: vcvtneph2bf8s ymm22 {k7}, zmm23
0x62,0xa5,0x7e,0x4f,0x74,0xf7
# ATT: vcvtneph2bf8s %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtneph2bf8s ymm22 {k7} {z}, zmm23
0x62,0xa5,0x7e,0xcf,0x74,0xf7
# ATT: vcvtneph2bf8s %ymm23, %xmm22
# INTEL: vcvtneph2bf8s xmm22, ymm23
0x62,0xa5,0x7e,0x28,0x74,0xf7
# ATT: vcvtneph2bf8s %ymm23, %xmm22 {%k7}
# INTEL: vcvtneph2bf8s xmm22 {k7}, ymm23
0x62,0xa5,0x7e,0x2f,0x74,0xf7
# ATT: vcvtneph2bf8s %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, ymm23
0x62,0xa5,0x7e,0xaf,0x74,0xf7
# ATT: vcvtneph2bf8sx 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtneph2bf8s xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7e,0x08,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtneph2bf8sx 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtneph2bf8s xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7e,0x0f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtneph2bf8s (%rip){1to8}, %xmm22
# INTEL: vcvtneph2bf8s xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7e,0x18,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2bf8sx -512(,%rbp,2), %xmm22
# INTEL: vcvtneph2bf8s xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7e,0x08,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtneph2bf8sx 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7e,0x8f,0x74,0x71,0x7f
# ATT: vcvtneph2bf8s -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7e,0x9f,0x74,0x72,0x80
# ATT: vcvtneph2bf8s (%rip){1to16}, %xmm22
# INTEL: vcvtneph2bf8s xmm22, word ptr [rip]{1to16}
0x62,0xe5,0x7e,0x38,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2bf8sy -1024(,%rbp,2), %xmm22
# INTEL: vcvtneph2bf8s xmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7e,0x28,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtneph2bf8sy 4064(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7e,0xaf,0x74,0x71,0x7f
# ATT: vcvtneph2bf8s -256(%rdx){1to16}, %xmm22 {%k7} {z}
# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7e,0xbf,0x74,0x72,0x80
# ATT: vcvtneph2bf8s 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtneph2bf8s ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7e,0x48,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtneph2bf8s 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtneph2bf8s ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7e,0x4f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtneph2bf8s (%rip){1to32}, %ymm22
# INTEL: vcvtneph2bf8s ymm22, word ptr [rip]{1to32}
0x62,0xe5,0x7e,0x58,0x74,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2bf8s -2048(,%rbp,2), %ymm22
# INTEL: vcvtneph2bf8s ymm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7e,0x48,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtneph2bf8s 8128(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtneph2bf8s ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7e,0xcf,0x74,0x71,0x7f
# ATT: vcvtneph2bf8s -256(%rdx){1to32}, %ymm22 {%k7} {z}
# INTEL: vcvtneph2bf8s ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7e,0xdf,0x74,0x72,0x80
# ATT: vcvtneph2hf8 %xmm23, %xmm22
# INTEL: vcvtneph2hf8 xmm22, xmm23
0x62,0xa5,0x7e,0x08,0x18,0xf7
# ATT: vcvtneph2hf8 %xmm23, %xmm22 {%k7}
# INTEL: vcvtneph2hf8 xmm22 {k7}, xmm23
0x62,0xa5,0x7e,0x0f,0x18,0xf7
# ATT: vcvtneph2hf8 %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7e,0x8f,0x18,0xf7
# ATT: vcvtneph2hf8 %zmm23, %ymm22
# INTEL: vcvtneph2hf8 ymm22, zmm23
0x62,0xa5,0x7e,0x48,0x18,0xf7
# ATT: vcvtneph2hf8 %zmm23, %ymm22 {%k7}
# INTEL: vcvtneph2hf8 ymm22 {k7}, zmm23
0x62,0xa5,0x7e,0x4f,0x18,0xf7
# ATT: vcvtneph2hf8 %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtneph2hf8 ymm22 {k7} {z}, zmm23
0x62,0xa5,0x7e,0xcf,0x18,0xf7
# ATT: vcvtneph2hf8 %ymm23, %xmm22
# INTEL: vcvtneph2hf8 xmm22, ymm23
0x62,0xa5,0x7e,0x28,0x18,0xf7
# ATT: vcvtneph2hf8 %ymm23, %xmm22 {%k7}
# INTEL: vcvtneph2hf8 xmm22 {k7}, ymm23
0x62,0xa5,0x7e,0x2f,0x18,0xf7
# ATT: vcvtneph2hf8 %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, ymm23
0x62,0xa5,0x7e,0xaf,0x18,0xf7
# ATT: vcvtneph2hf8x 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtneph2hf8 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7e,0x08,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtneph2hf8x 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtneph2hf8 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7e,0x0f,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtneph2hf8 (%rip){1to8}, %xmm22
# INTEL: vcvtneph2hf8 xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7e,0x18,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2hf8x -512(,%rbp,2), %xmm22
# INTEL: vcvtneph2hf8 xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7e,0x08,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtneph2hf8x 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7e,0x8f,0x18,0x71,0x7f
# ATT: vcvtneph2hf8 -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7e,0x9f,0x18,0x72,0x80
# ATT: vcvtneph2hf8 (%rip){1to16}, %xmm22
# INTEL: vcvtneph2hf8 xmm22, word ptr [rip]{1to16}
0x62,0xe5,0x7e,0x38,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2hf8y -1024(,%rbp,2), %xmm22
# INTEL: vcvtneph2hf8 xmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7e,0x28,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtneph2hf8y 4064(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7e,0xaf,0x18,0x71,0x7f
# ATT: vcvtneph2hf8 -256(%rdx){1to16}, %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7e,0xbf,0x18,0x72,0x80
# ATT: vcvtneph2hf8 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtneph2hf8 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7e,0x48,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtneph2hf8 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtneph2hf8 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7e,0x4f,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtneph2hf8 (%rip){1to32}, %ymm22
# INTEL: vcvtneph2hf8 ymm22, word ptr [rip]{1to32}
0x62,0xe5,0x7e,0x58,0x18,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2hf8 -2048(,%rbp,2), %ymm22
# INTEL: vcvtneph2hf8 ymm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7e,0x48,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtneph2hf8 8128(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtneph2hf8 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7e,0xcf,0x18,0x71,0x7f
# ATT: vcvtneph2hf8 -256(%rdx){1to32}, %ymm22 {%k7} {z}
# INTEL: vcvtneph2hf8 ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7e,0xdf,0x18,0x72,0x80
# ATT: vcvtneph2hf8s %xmm23, %xmm22
# INTEL: vcvtneph2hf8s xmm22, xmm23
0x62,0xa5,0x7e,0x08,0x1b,0xf7
# ATT: vcvtneph2hf8s %xmm23, %xmm22 {%k7}
# INTEL: vcvtneph2hf8s xmm22 {k7}, xmm23
0x62,0xa5,0x7e,0x0f,0x1b,0xf7
# ATT: vcvtneph2hf8s %xmm23, %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7e,0x8f,0x1b,0xf7
# ATT: vcvtneph2hf8s %zmm23, %ymm22
# INTEL: vcvtneph2hf8s ymm22, zmm23
0x62,0xa5,0x7e,0x48,0x1b,0xf7
# ATT: vcvtneph2hf8s %zmm23, %ymm22 {%k7}
# INTEL: vcvtneph2hf8s ymm22 {k7}, zmm23
0x62,0xa5,0x7e,0x4f,0x1b,0xf7
# ATT: vcvtneph2hf8s %zmm23, %ymm22 {%k7} {z}
# INTEL: vcvtneph2hf8s ymm22 {k7} {z}, zmm23
0x62,0xa5,0x7e,0xcf,0x1b,0xf7
# ATT: vcvtneph2hf8s %ymm23, %xmm22
# INTEL: vcvtneph2hf8s xmm22, ymm23
0x62,0xa5,0x7e,0x28,0x1b,0xf7
# ATT: vcvtneph2hf8s %ymm23, %xmm22 {%k7}
# INTEL: vcvtneph2hf8s xmm22 {k7}, ymm23
0x62,0xa5,0x7e,0x2f,0x1b,0xf7
# ATT: vcvtneph2hf8s %ymm23, %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, ymm23
0x62,0xa5,0x7e,0xaf,0x1b,0xf7
# ATT: vcvtneph2hf8sx 268435456(%rbp,%r14,8), %xmm22
# INTEL: vcvtneph2hf8s xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7e,0x08,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtneph2hf8sx 291(%r8,%rax,4), %xmm22 {%k7}
# INTEL: vcvtneph2hf8s xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7e,0x0f,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtneph2hf8s (%rip){1to8}, %xmm22
# INTEL: vcvtneph2hf8s xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7e,0x18,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2hf8sx -512(,%rbp,2), %xmm22
# INTEL: vcvtneph2hf8s xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7e,0x08,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff
# ATT: vcvtneph2hf8sx 2032(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7e,0x8f,0x1b,0x71,0x7f
# ATT: vcvtneph2hf8s -256(%rdx){1to8}, %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7e,0x9f,0x1b,0x72,0x80
# ATT: vcvtneph2hf8s (%rip){1to16}, %xmm22
# INTEL: vcvtneph2hf8s xmm22, word ptr [rip]{1to16}
0x62,0xe5,0x7e,0x38,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2hf8sy -1024(,%rbp,2), %xmm22
# INTEL: vcvtneph2hf8s xmm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7e,0x28,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff
# ATT: vcvtneph2hf8sy 4064(%rcx), %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7e,0xaf,0x1b,0x71,0x7f
# ATT: vcvtneph2hf8s -256(%rdx){1to16}, %xmm22 {%k7} {z}
# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7e,0xbf,0x1b,0x72,0x80
# ATT: vcvtneph2hf8s 268435456(%rbp,%r14,8), %ymm22
# INTEL: vcvtneph2hf8s ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7e,0x48,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
# ATT: vcvtneph2hf8s 291(%r8,%rax,4), %ymm22 {%k7}
# INTEL: vcvtneph2hf8s ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7e,0x4f,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
# ATT: vcvtneph2hf8s (%rip){1to32}, %ymm22
# INTEL: vcvtneph2hf8s ymm22, word ptr [rip]{1to32}
0x62,0xe5,0x7e,0x58,0x1b,0x35,0x00,0x00,0x00,0x00
# ATT: vcvtneph2hf8s -2048(,%rbp,2), %ymm22
# INTEL: vcvtneph2hf8s ymm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7e,0x48,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff
# ATT: vcvtneph2hf8s 8128(%rcx), %ymm22 {%k7} {z}
# INTEL: vcvtneph2hf8s ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7e,0xcf,0x1b,0x71,0x7f
# ATT: vcvtneph2hf8s -256(%rdx){1to32}, %ymm22 {%k7} {z}
# INTEL: vcvtneph2hf8s ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7e,0xdf,0x1b,0x72,0x80
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