llvm/llvm/test/CodeGen/AArch64/machine-cp-constant-reg.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s

---
name: test
body: |
  bb.0:
    liveins: $w2
    ; CHECK-LABEL: name: test
    ; CHECK: liveins: $w2
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $wzr = SUBSWri killed renamable $w2, 0, 0, implicit-def $nzcv
    ; CHECK-NEXT: renamable $w0 = COPY $wzr
    ; CHECK-NEXT: RET_ReallyLR implicit killed $w0
    renamable $w1 = COPY $wzr
    $wzr = SUBSWri killed renamable $w2, 0, 0, implicit-def $nzcv
    renamable $w0 = COPY killed renamable $w1
    RET_ReallyLR implicit killed $w0
...