//===- llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h -----------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // /// \file This file declares the GIMatchTableExecutor API, the opcodes supported /// by the match table, and some associated data structures used by the /// executor's implementation (see `GIMatchTableExecutorImpl.h`). // //===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H #define LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/Bitset.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/GlobalISel/Utils.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGenTypes/LowLevelType.h" #include "llvm/IR/Function.h" #include <bitset> #include <cstddef> #include <cstdint> #include <functional> #include <initializer_list> #include <optional> #include <vector> namespace llvm { class BlockFrequencyInfo; class CodeGenCoverage; class MachineBasicBlock; class ProfileSummaryInfo; class APInt; class APFloat; class GISelKnownBits; class MachineInstr; class MachineIRBuilder; class MachineInstrBuilder; class MachineFunction; class MachineOperand; class MachineRegisterInfo; class RegisterBankInfo; class TargetInstrInfo; class TargetRegisterInfo; enum { … }; /// The MatchTable is encoded as an array of bytes. /// Thus, opcodes are expected to be <255. /// /// Operands can be variable-sized, their size is always after their name /// in the docs, e.g. "Foo(4)" means that "Foo" takes 4 entries in the table, /// so 4 bytes. "Foo()" /// /// As a general rule of thumb: /// - Instruction & Operand IDs are ULEB128 /// - LLT IDs are 1 byte /// - Predicates and target opcodes, register and register class IDs are 2 /// bytes. /// - Indexes into the table are 4 bytes. /// - Inline constants are 8 bytes /// /// Design notes: /// - Inst/Op IDs have to be LEB128 because some targets generate /// extremely long patterns which need more than 255 temporaries. /// We could just use 2 bytes everytime, but then some targets like /// X86/AMDGPU that have no need for it will pay the price all the time. enum { … }; /// Provides the logic to execute GlobalISel match tables, which are used by the /// instruction selector and instruction combiners as their engine to match and /// apply MIR patterns. class GIMatchTableExecutor { … }; } // end namespace llvm #endif // LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H