#ifndef ASIC_REG_DCORE0_TPC0_CFG_QM_TENSOR_0_REGS_H_
#define ASIC_REG_DCORE0_TPC0_CFG_QM_TENSOR_0_REGS_H_
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_BASE_ADDR_LOW …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_BASE_ADDR_HIGH …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_PADDING_VALUE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_TENSOR_CONFIG …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_0_SIZE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_0_STRIDE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_1_SIZE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_1_STRIDE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_2_SIZE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_2_STRIDE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_3_SIZE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_3_STRIDE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_4_SIZE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_4_STRIDE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_PREF_STRIDE …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_0_SIZE_STRIDE_HIGH …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_1_SIZE_STRIDE_HIGH …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_2_SIZE_STRIDE_HIGH …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_3_SIZE_STRIDE_HIGH …
#define mmDCORE0_TPC0_CFG_QM_TENSOR_0_DIM_4_SIZE_STRIDE_HIGH …
#endif