llvm/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp

//===-- SIFixVGPRCopies.cpp - Fix VGPR Copies after regalloc --------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// Add implicit use of exec to vector register copies.
///
//===----------------------------------------------------------------------===//

#include "AMDGPU.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/CodeGen/MachineFunctionPass.h"

usingnamespacellvm;

#define DEBUG_TYPE …

namespace {

class SIFixVGPRCopies : public MachineFunctionPass { … };

} // End anonymous namespace.

INITIALIZE_PASS(…)

char SIFixVGPRCopies::ID = …;

char &llvm::SIFixVGPRCopiesID = …;

bool SIFixVGPRCopies::runOnMachineFunction(MachineFunction &MF) { … }